| Message ID | 20190524162023.9115-8-linus.walleij@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | Xscale IXP4xx ethernet refurbishing | expand |
> +description: | > + The Intel IXP4xx ethernet makes use of the IXP4xx NPE (Network > + Processing Engine) and the IXP4xx Queue Mangager to process > + the ethernet frames. It can optionally contain an MDIO bus to > + talk to PHYs. Hi Linus You mention MDIO and PHYs, but the code is not there yet. When you do add the needed code, it is a good idea to place the PHY nodes inside a container node: ethernet@c8009000 { compatible = "intel,ixp4xx-ethernet"; reg = <0xc8009000 0x1000>; status = "disabled"; queue-rx = <&qmgr 3>; queue-txready = <&qmgr 20>; mdio { phy0: phy@0 { reg = <0>; }; }; }; Andrew
On Fri, May 24, 2019 at 10:06 PM Andrew Lunn <andrew@lunn.ch> wrote: > > +description: | > > + The Intel IXP4xx ethernet makes use of the IXP4xx NPE (Network > > + Processing Engine) and the IXP4xx Queue Mangager to process > > + the ethernet frames. It can optionally contain an MDIO bus to > > + talk to PHYs. > > Hi Linus > > You mention MDIO and PHYs, but the code is not there yet. When you do > add the needed code, it is a good idea to place the PHY nodes inside a > container node: Actually I think the MDIO needs to go into the NPE (network processing engine) node, that is where it actually is implemented. It coincides with having to rewrite the code in Linux to split that off into its own device as you pointed out on patch 1, hm a bit of work ahead here... Yours, Linus Walleij
diff --git a/Documentation/devicetree/bindings/net/intel,ixp4xx-ethernet.yaml b/Documentation/devicetree/bindings/net/intel,ixp4xx-ethernet.yaml new file mode 100644 index 000000000000..4575a7e5aa4a --- /dev/null +++ b/Documentation/devicetree/bindings/net/intel,ixp4xx-ethernet.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2018 Linaro Ltd. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/net/intel-ixp4xx-ethernet.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Intel IXP4xx ethernet + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +description: | + The Intel IXP4xx ethernet makes use of the IXP4xx NPE (Network + Processing Engine) and the IXP4xx Queue Mangager to process + the ethernet frames. It can optionally contain an MDIO bus to + talk to PHYs. + +properties: + compatible: + oneOf: + - items: + - const: intel,ixp4xx-ethernet + + reg: + maxItems: 1 + description: Ethernet MMIO address range + + queue-rx: + $ref: '/schemas/types.yaml#/definitions/phandle-array' + maxItems: 1 + description: phandle to the RX queue on the NPE + + queue-txready: + $ref: '/schemas/types.yaml#/definitions/phandle-array' + maxItems: 1 + description: phandle to the TX READY queue on the NPE + +required: + - compatible + - reg + - queue-rx + - queue-txready + +examples: + - | + ethernet@c8009000 { + compatible = "intel,ixp4xx-ethernet"; + reg = <0xc8009000 0x1000>; + status = "disabled"; + queue-rx = <&qmgr 3>; + queue-txready = <&qmgr 20>; + };
This adds device tree bindings for the IXP4xx ethernet. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- .../bindings/net/intel,ixp4xx-ethernet.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/intel,ixp4xx-ethernet.yaml -- 2.20.1