From patchwork Mon Feb 8 13:55:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 378997 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01C9AC433E9 for ; Mon, 8 Feb 2021 14:02:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BACF764E7C for ; Mon, 8 Feb 2021 14:02:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232018AbhBHOCC (ORCPT ); Mon, 8 Feb 2021 09:02:02 -0500 Received: from mail.baikalelectronics.com ([87.245.175.226]:57064 "EHLO mail.baikalelectronics.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231904AbhBHN5r (ORCPT ); Mon, 8 Feb 2021 08:57:47 -0500 From: Serge Semin To: Rob Herring , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Johan Hovold , Maxime Ripard , Joao Pinto , Lars Persson CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , Vyacheslav Mitrofanov , Maxime Coquelin , , , , , , Rob Herring Subject: [PATCH v2 06/24] dt-bindings: net: dwmac: Add Tx/Rx clock sources Date: Mon, 8 Feb 2021 16:55:50 +0300 Message-ID: <20210208135609.7685-7-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20210208135609.7685-1-Sergey.Semin@baikalelectronics.ru> References: <20210208135609.7685-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Generic DW *MAC can be connected to an external Transmit and Receive clock generators. Add the corresponding clocks description and clock-names to the generic bindings schema so new DW *MAC-based bindings wouldn't declare its own names of the same clocks. Signed-off-by: Serge Semin Reviewed-by: Rob Herring --- .../devicetree/bindings/net/snps,dwmac.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 21e53427551c..56baf8e6bf17 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -126,6 +126,18 @@ properties: MCI, CSR and SMA interfaces run on this clock. If it's omitted, the CSR interfaces are considered as synchronous to the system clock domain. + - description: + GMAC Tx clock or so called Transmit clock. The clock is supplied + by an external with respect to the DW MAC clock generator. + The clock source and its frequency depends on the DW MAC xMII mode. + In case if it's supplied by PHY/SerDes this property can be + omitted. + - description: + GMAC Rx clock or so called Receive clock. The clock is supplied + by an external with respect to the DW MAC clock generator. + The clock source and its frequency depends on the DW MAC xMII mode. + In case if it's supplied by PHY/SerDes or it's synchronous to + the Tx clock this property can be omitted. - description: PTP reference clock. This clock is used for programming the Timestamp Addend Register. If not passed then the system @@ -139,6 +151,8 @@ properties: enum: - stmmaceth - pclk + - tx + - rx - ptp_ref resets: