From patchwork Mon Feb 8 14:08:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 378977 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4123C433E0 for ; Mon, 8 Feb 2021 14:20:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7F3AA64E30 for ; Mon, 8 Feb 2021 14:20:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232802AbhBHOUM (ORCPT ); Mon, 8 Feb 2021 09:20:12 -0500 Received: from mail.baikalelectronics.com ([87.245.175.226]:57512 "EHLO mail.baikalelectronics.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231622AbhBHOJm (ORCPT ); Mon, 8 Feb 2021 09:09:42 -0500 From: Serge Semin To: Rob Herring , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Maxime Coquelin CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , Vyacheslav Mitrofanov , , , , , Subject: [PATCH 09/16] net: stmmac: Disable MMC IRQs in the generic IRQs disable method Date: Mon, 8 Feb 2021 17:08:13 +0300 Message-ID: <20210208140820.10410-10-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20210208140820.10410-1-Sergey.Semin@baikalelectronics.ru> References: <20210208140820.10410-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org MMC IRQs aren't handled by the main ISR, so for the sake of the code coherency let's move the MMC IRQs disabling procedure to the generic IRQs de-activating method. By doing so we've finally finished filling the generic IRQs enable/disable functions up with the individual MAC/MTL/DMA/etc interrupt control methods. Signed-off-by: Serge Semin --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index ddcd82d02c27..fcd59a647b02 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -2274,8 +2274,6 @@ static void stmmac_mmc_setup(struct stmmac_priv *priv) unsigned int mode = MMC_CNTRL_RESET_ON_READ | MMC_CNTRL_COUNTER_RESET | MMC_CNTRL_PRESET | MMC_CNTRL_FULL_HALF_PRESET; - stmmac_mmc_intr_all_mask(priv, priv->mmcaddr); - if (priv->dma_cap.rmon) { stmmac_mmc_ctrl(priv, priv->mmcaddr, mode); memset(&priv->mmc, 0, sizeof(struct stmmac_counters)); @@ -4182,6 +4180,8 @@ static void stmmac_disable_irq(struct stmmac_priv *priv) if (priv->dma_cap.asp) stmmac_disable_safety_feat_irq(priv, priv->ioaddr); + stmmac_mmc_intr_all_mask(priv, priv->mmcaddr); + enable_irq(priv->dev->irq); }