From patchwork Mon Feb 8 14:08:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 378974 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2EF12C433E6 for ; Mon, 8 Feb 2021 14:23:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E33A264E8A for ; Mon, 8 Feb 2021 14:23:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232820AbhBHOWt (ORCPT ); Mon, 8 Feb 2021 09:22:49 -0500 Received: from mail.baikalelectronics.com ([87.245.175.226]:57764 "EHLO mail.baikalelectronics.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232091AbhBHOKL (ORCPT ); Mon, 8 Feb 2021 09:10:11 -0500 From: Serge Semin To: Rob Herring , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Maxime Coquelin CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , Vyacheslav Mitrofanov , , , , , Subject: [PATCH 12/16] net: stmmac: Introduce NIC software reset function Date: Mon, 8 Feb 2021 17:08:16 +0300 Message-ID: <20210208140820.10410-13-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20210208140820.10410-1-Sergey.Semin@baikalelectronics.ru> References: <20210208140820.10410-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Since we are about to move the IRQs handler setup into the device probe method, the DW MAC reset procedure needs to be redefined to be performed with care. We must make sure the IRQs handler isn't executed while the reset is proceeded and the IRQs are fully masked after that. The later is required for some early versions of DW GMAC (in our case it's DW GMAC v3.73a). Signed-off-by: Serge Semin --- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 32 +++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index b37f49f3dc03..c4c41b554c6a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -1827,6 +1827,34 @@ static void free_dma_desc_resources(struct stmmac_priv *priv) free_dma_tx_desc_resources(priv); } +/** + * stmmac_sw_reset - reset the MAC/DMA/etc state + * @priv: driver private structure + * Description: Cleanup/reset the DW *MAC registers to their initial state. + */ +static int stmmac_sw_reset(struct stmmac_priv *priv) +{ + int ret; + + /* Disable the IRQ signal while the reset is in progress so not to + * interfere with what the main ISR is doing. + */ + disable_irq(priv->dev->irq); + + ret = stmmac_reset(priv, priv->ioaddr); + + /* Make sure all IRQs are disabled by default. Some DW MAC IP-cores + * like early versions of DW GMAC have MAC and MMC interrupts enabled + * after reset. + */ + if (!ret) + stmmac_disable_irq(priv); + + enable_irq(priv->dev->irq); + + return ret; +} + /** * stmmac_mac_enable_rx_queues - Enable MAC rx queues * @priv: driver private structure @@ -2340,9 +2368,9 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv) if (priv->extend_desc && (priv->mode == STMMAC_RING_MODE)) atds = 1; - ret = stmmac_reset(priv, priv->ioaddr); + ret = stmmac_sw_reset(priv); if (ret) { - dev_err(priv->device, "Failed to reset the dma\n"); + dev_err(priv->device, "Failed to reset the core\n"); return ret; }