@@ -9,6 +9,14 @@
#include "ipa_endpoint.h"
#include "ipa_mem.h"
+/* QSB configuration for the SC7180 SoC. */
+static const struct ipa_qsb_data ipa_qsb_data[] = {
+ [IPA_QSB_MASTER_DDR] = {
+ .max_writes = 8,
+ .max_reads = 12,
+ },
+};
+
/* Endpoint configuration for the SC7180 SoC. */
static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
[IPA_ENDPOINT_AP_COMMAND_TX] = {
@@ -328,6 +336,8 @@ static const struct ipa_clock_data ipa_clock_data = {
/* Configuration data for the SC7180 SoC. */
const struct ipa_data ipa_data_sc7180 = {
.version = IPA_VERSION_4_2,
+ .qsb_count = ARRAY_SIZE(ipa_qsb_data),
+ .qsb_data = ipa_qsb_data,
.endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
.endpoint_data = ipa_gsi_endpoint_data,
.resource_data = &ipa_resource_data,
@@ -11,6 +11,18 @@
#include "ipa_endpoint.h"
#include "ipa_mem.h"
+/* QSB configuration for the SDM845 SoC. */
+static const struct ipa_qsb_data ipa_qsb_data[] = {
+ [IPA_QSB_MASTER_DDR] = {
+ .max_writes = 8,
+ .max_reads = 8,
+ },
+ [IPA_QSB_MASTER_PCIE] = {
+ .max_writes = 4,
+ .max_reads = 12,
+ },
+};
+
/* Endpoint configuration for the SDM845 SoC. */
static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
[IPA_ENDPOINT_AP_COMMAND_TX] = {
@@ -353,6 +365,8 @@ static const struct ipa_clock_data ipa_clock_data = {
/* Configuration data for the SDM845 SoC. */
const struct ipa_data ipa_data_sdm845 = {
.version = IPA_VERSION_3_5_1,
+ .qsb_count = ARRAY_SIZE(ipa_qsb_data),
+ .qsb_data = ipa_qsb_data,
.endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
.endpoint_data = ipa_gsi_endpoint_data,
.resource_data = &ipa_resource_data,
@@ -49,6 +49,22 @@
#define IPA_RESOURCE_GROUP_SRC_MAX 5
#define IPA_RESOURCE_GROUP_DST_MAX 5
+/** enum ipa_qsb_master_id - array index for IPA QSB configuration data */
+enum ipa_qsb_master_id {
+ IPA_QSB_MASTER_DDR,
+ IPA_QSB_MASTER_PCIE,
+};
+
+/**
+ * struct ipa_qsb_data - Qualcomm System Bus configuration data
+ * @max_writes: Maximum outstanding write requests for this master
+ * @max_reads: Maximum outstanding read requests for this master
+ */
+struct ipa_qsb_data {
+ u8 max_writes;
+ u8 max_reads;
+};
+
/**
* struct gsi_channel_data - GSI channel configuration data
* @tre_count: number of TREs in the channel ring
@@ -285,14 +301,18 @@ struct ipa_clock_data {
/**
* struct ipa_data - combined IPA/GSI configuration data
* @version: IPA hardware version
- * @endpoint_count: number of entries in endpoint_data array
+ * @qsb_count: number of entries in the qsb_data array
+ * @qsb_data: Qualcomm System Bus configuration data
+ * @endpoint_count: number of entries in the endpoint_data array
* @endpoint_data: IPA endpoint/GSI channel data
* @resource_data: IPA resource configuration data
- * @mem_count: number of entries in mem_data array
+ * @mem_count: number of entries in the mem_data array
* @mem_data: IPA-local shared memory region data
*/
struct ipa_data {
enum ipa_version version;
+ u32 qsb_count; /* # entries in qsb_data[] */
+ const struct ipa_qsb_data *qsb_data;
u32 endpoint_count; /* # entries in endpoint_data[] */
const struct ipa_gsi_endpoint_data *endpoint_data;
const struct ipa_resource_data *resource_data;
Define the maximum number of reads and writes to configure for the QSB masters used for IPA in configuration data. We don't use these values yet; the next commit takes care of that. Signed-off-by: Alex Elder <elder@linaro.org> --- drivers/net/ipa/ipa_data-sc7180.c | 10 ++++++++++ drivers/net/ipa/ipa_data-sdm845.c | 14 ++++++++++++++ drivers/net/ipa/ipa_data.h | 24 ++++++++++++++++++++++-- 3 files changed, 46 insertions(+), 2 deletions(-) -- 2.27.0