From patchwork Wed Sep 8 19:06:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Keith Packard X-Patchwork-Id: 508253 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIM_ADSP_ALL, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0FB8C433EF for ; Wed, 8 Sep 2021 19:07:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C97E161179 for ; Wed, 8 Sep 2021 19:07:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350330AbhIHTHz (ORCPT ); Wed, 8 Sep 2021 15:07:55 -0400 Received: from home.keithp.com ([63.227.221.253]:35746 "EHLO elaine.keithp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350339AbhIHTHa (ORCPT ); Wed, 8 Sep 2021 15:07:30 -0400 Received: from localhost (localhost [127.0.0.1]) by elaine.keithp.com (Postfix) with ESMTP id 4C7193F30884; Wed, 8 Sep 2021 12:05:52 -0700 (PDT) X-Virus-Scanned: Debian amavisd-new at keithp.com Received: from elaine.keithp.com ([127.0.0.1]) by localhost (elaine.keithp.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id hrJI3NCUC0ro; Wed, 8 Sep 2021 12:05:51 -0700 (PDT) Received: from keithp.com (168-103-156-98.tukw.qwest.net [168.103.156.98]) by elaine.keithp.com (Postfix) with ESMTPSA id 2E7DD3F30890; Wed, 8 Sep 2021 12:05:49 -0700 (PDT) Received: by keithp.com (Postfix, from userid 1000) id 65CAB1E6013C; Wed, 8 Sep 2021 12:06:09 -0700 (PDT) From: Keith Packard To: linux-kernel@vger.kernel.org Cc: Abbott Liu , Alexei Starovoitov , Andrew Morton , Andrii Nakryiko , Anshuman Khandual , Ard Biesheuvel , Arnd Bergmann , Ben Segall , Bjorn Andersson , bpf@vger.kernel.org, Christoph Lameter , Daniel Borkmann , Daniel Bristot de Oliveira , Dennis Zhou , devicetree@vger.kernel.org, Dietmar Eggemann , Florian Fainelli , Frank Rowand , Geert Uytterhoeven , Ingo Molnar , Jason Wang , Jens Axboe , Joe Perches , John Fastabend , Juri Lelli , Keith Packard , KP Singh , kvm@vger.kernel.org, Linus Walleij , linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, Manivannan Sadhasivam , Marc Zyngier , Martin KaFai Lau , Mel Gorman , Michael Ellerman , "Michael S. Tsirkin" , Miguel Ojeda , Mike Rapoport , netdev@vger.kernel.org, Nick Desaulniers , Nick Desaulniers , Nicolas Pitre , Peter Zijlstra , Rob Herring , Russell King , Song Liu , Srikar Dronamraju , Steven Rostedt , Tejun Heo , Thomas Gleixner , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Valentin Schneider , Vincent Guittot , virtualization@lists.linux-foundation.org, "Wolfram Sang (Renesas)" , YiFei Zhu , Yonghong Song Subject: [PATCH v4 6/7] ARM: Use TPIDRPRW for current Date: Wed, 8 Sep 2021 12:06:04 -0700 Message-Id: <20210908190605.419064-7-keithpac@amazon.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210908190605.419064-1-keithpac@amazon.com> References: <20210908190605.419064-1-keithpac@amazon.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Store current task pointer in CPU thread ID register TPIDRPRW so that accessing it doesn't depend on being able to locate thread_info off of the kernel stack pointer. Signed-off-by: Keith Packard --- arch/arm/Kconfig | 4 +++ arch/arm/include/asm/assembler.h | 8 +++++ arch/arm/include/asm/current.h | 54 ++++++++++++++++++++++++++++++++ arch/arm/kernel/entry-armv.S | 4 +++ arch/arm/kernel/setup.c | 1 + arch/arm/kernel/smp.c | 1 + 6 files changed, 72 insertions(+) create mode 100644 arch/arm/include/asm/current.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 24804f11302d..414fe23fd5ac 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1172,6 +1172,10 @@ config SMP_ON_UP If you don't know what to do here, say Y. +config CURRENT_POINTER_IN_TPIDRPRW + def_bool y + depends on (CPU_V6K || CPU_V7) && !CPU_V6 + config ARM_CPU_TOPOLOGY bool "Support cpu topology definition" depends on SMP && CPU_V7 diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index e2b1fd558bf3..ea12fe3bb589 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -209,6 +209,14 @@ mov \rd, \rd, lsl #THREAD_SIZE_ORDER + PAGE_SHIFT .endm +/* + * Set current task_info + * @src: Source register containing task_struct pointer + */ + .macro set_current src : req + mcr p15, 0, \src, c13, c0, 4 + .endm + /* * Increment/decrement the preempt count. */ diff --git a/arch/arm/include/asm/current.h b/arch/arm/include/asm/current.h new file mode 100644 index 000000000000..ec25737855e5 --- /dev/null +++ b/arch/arm/include/asm/current.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright © 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Author Keith Packard + */ + +#ifndef _ASM_ARM_CURRENT_H_ +#define _ASM_ARM_CURRENT_H_ + +#ifndef __ASSEMBLY__ + +register unsigned long current_stack_pointer asm ("sp"); + +/* + * Same as asm-generic/current.h, except that we store current + * in TPIDRPRW. TPIDRPRW only exists on V6K and V7 + */ +#ifdef CONFIG_CURRENT_POINTER_IN_TPIDRPRW + +struct task_struct; + +static inline void set_current(struct task_struct *tsk) +{ + /* Set TPIDRPRW */ + asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (tsk) : "memory"); +} + +static __always_inline struct task_struct *get_current(void) +{ + struct task_struct *tsk; + + /* + * Read TPIDRPRW. + * We want to allow caching the value, so avoid using volatile and + * instead use a fake stack read to hazard against barrier(). + */ + asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (tsk) + : "Q" (*(const unsigned long *)current_stack_pointer)); + + return tsk; +} +#define current get_current() +#else + +#define set_current(tsk) do {} while (0) + +#include + +#endif /* CONFIG_SMP */ + +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_ARM_CURRENT_H_ */ diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 0ea8529a4872..db3947ee9c3e 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -761,6 +761,10 @@ ENTRY(__switch_to) ldr r6, [r2, #TI_CPU_DOMAIN] #endif switch_tls r1, r4, r5, r3, r7 +#ifdef CONFIG_CURRENT_POINTER_IN_TPIDRPRW + ldr r7, [r2, #TI_TASK] + set_current r7 +#endif #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP) ldr r7, [r2, #TI_TASK] ldr r8, =__stack_chk_guard diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index d0dc60afe54f..2fdf8c31d6c9 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -586,6 +586,7 @@ void __init smp_setup_processor_id(void) u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; u32 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); + set_current(&init_task); cpu_logical_map(0) = cpu; for (i = 1; i < nr_cpu_ids; ++i) cpu_logical_map(i) = i == cpu ? 0 : i; diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 8ccf10b34f08..09771916442a 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -410,6 +410,7 @@ asmlinkage void secondary_start_kernel(unsigned int cpu, struct task_struct *tas { struct mm_struct *mm = &init_mm; + set_current(task); secondary_biglittle_init(); /*