From patchwork Thu Jan 28 02:33:12 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 60670 Delivered-To: patch@linaro.org Received: by 10.112.130.2 with SMTP id oa2csp207955lbb; Wed, 27 Jan 2016 18:35:59 -0800 (PST) X-Received: by 10.28.54.209 with SMTP id y78mr408688wmh.26.1453948559393; Wed, 27 Jan 2016 18:35:59 -0800 (PST) Return-Path: Received: from lists.xen.org (lists.xenproject.org. [50.57.142.19]) by mx.google.com with ESMTPS id f15si12264756wjs.71.2016.01.27.18.35.58 (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 27 Jan 2016 18:35:59 -0800 (PST) Received-SPF: neutral (google.com: 50.57.142.19 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=50.57.142.19; Authentication-Results: mx.google.com; spf=neutral (google.com: 50.57.142.19 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aOcPm-00062R-TW; Thu, 28 Jan 2016 02:34:30 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aOcPl-00062M-0Z for xen-devel@lists.xen.org; Thu, 28 Jan 2016 02:34:29 +0000 Received: from [85.158.143.35] by server-3.bemta-4.messagelabs.com id C3/60-31122-43E79A65; Thu, 28 Jan 2016 02:34:28 +0000 X-Env-Sender: zhaoshenglong@huawei.com X-Msg-Ref: server-10.tower-21.messagelabs.com!1453948462!12532999!1 X-Originating-IP: [58.251.152.64] X-SpamReason: No, hits=0.5 required=7.0 tests=BODY_RANDOM_LONG X-StarScan-Received: X-StarScan-Version: 7.35.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 38202 invoked from network); 28 Jan 2016 02:34:26 -0000 Received: from szxga01-in.huawei.com (HELO szxga01-in.huawei.com) (58.251.152.64) by server-10.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 28 Jan 2016 02:34:26 -0000 Received: from 172.24.1.49 (EHLO szxeml431-hub.china.huawei.com) ([172.24.1.49]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DDU45832; Thu, 28 Jan 2016 10:34:03 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by szxeml431-hub.china.huawei.com (10.82.67.208) with Microsoft SMTP Server id 14.3.235.1; Thu, 28 Jan 2016 10:33:50 +0800 From: Shannon Zhao To: Date: Thu, 28 Jan 2016 10:33:12 +0800 Message-ID: <1453948392-9148-1-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1453536020-16196-7-git-send-email-zhaoshenglong@huawei.com> References: <1453536020-16196-7-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090203.56A97E1E.0014, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 780fb8dbf1e9a6f794be22ab2bb5e307 Cc: julien.grall@citrix.com, peter.huangpeng@huawei.com, stefano.stabellini@citrix.com, ian.campbell@citrix.com, shannon.zhao@linaro.org Subject: [Xen-devel] [PATCH v6 6/8] arm/gic-v3: Refactor gicv3_init into generic and dt specific parts X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org From: Shannon Zhao Refactor gic-v3 related functions into dt and generic parts. This will be helpful when adding acpi support for gic-v3. Signed-off-by: Shannon Zhao --- v6: keep vsize check in gicv3_init_v2 --- xen/arch/arm/gic-v3.c | 84 +++++++++++++++++++++++++++------------------------ 1 file changed, 45 insertions(+), 39 deletions(-) -- 2.0.4 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index a245b56..fa61231 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -1138,26 +1138,14 @@ static int __init cmp_rdist(const void *a, const void *b) return ( l->base < r->base) ? -1 : 0; } +static paddr_t __initdata dbase = INVALID_PADDR; +static paddr_t __initdata vbase = INVALID_PADDR, vsize = 0; +static paddr_t __initdata cbase = INVALID_PADDR, csize = 0; + /* If the GICv3 supports GICv2, initialize it */ -static void __init gicv3_init_v2(const struct dt_device_node *node, - paddr_t dbase) +static void __init gicv3_init_v2(void) { - int res; - paddr_t cbase, csize; - paddr_t vbase, vsize; - - /* - * For GICv3 supporting GICv2, GICC and GICV base address will be - * provided. - */ - res = dt_device_get_address(node, 1 + gicv3.rdist_count, - &cbase, &csize); - if ( res ) - return; - - res = dt_device_get_address(node, 1 + gicv3.rdist_count + 2, - &vbase, &vsize); - if ( res ) + if ( cbase == INVALID_PADDR || vbase == INVALID_PADDR ) return; /* @@ -1180,20 +1168,11 @@ static void __init gicv3_init_v2(const struct dt_device_node *node, vgic_v2_setup_hw(dbase, cbase, csize, vbase, 0); } -/* Set up the GIC */ -static int __init gicv3_init(void) +static void __init gicv3_dt_init(void) { struct rdist_region *rdist_regs; int res, i; - uint32_t reg; const struct dt_device_node *node = gicv3_info.node; - paddr_t dbase; - - if ( !cpu_has_gicv3 ) - { - dprintk(XENLOG_ERR, "GICv3: driver requires system register support\n"); - return -ENODEV; - } res = dt_device_get_address(node, 0, &dbase, NULL); if ( res ) @@ -1203,14 +1182,6 @@ static int __init gicv3_init(void) panic("GICv3: Found unaligned distributor address %"PRIpaddr"", dbase); - gicv3.map_dbase = ioremap_nocache(dbase, SZ_64K); - if ( !gicv3.map_dbase ) - panic("GICv3: Failed to ioremap for GIC distributor\n"); - - reg = readl_relaxed(GICD + GICD_PIDR2) & GIC_PIDR2_ARCH_MASK; - if ( reg != GIC_PIDR2_ARCH_GICv3 && reg != GIC_PIDR2_ARCH_GICv4 ) - panic("GICv3: no distributor detected\n"); - if ( !dt_property_read_u32(node, "#redistributor-regions", &gicv3.rdist_count) ) gicv3.rdist_count = 1; @@ -1248,6 +1219,41 @@ static int __init gicv3_init(void) panic("GICv3: Cannot find the maintenance IRQ"); gicv3_info.maintenance_irq = res; + /* + * For GICv3 supporting GICv2, GICC and GICV base address will be + * provided. + */ + res = dt_device_get_address(node, 1 + gicv3.rdist_count, + &cbase, &csize); + if ( res ) + return; + + dt_device_get_address(node, 1 + gicv3.rdist_count + 2, + &vbase, &vsize); +} + +/* Set up the GIC */ +static int __init gicv3_init(void) +{ + int res, i; + uint32_t reg; + + if ( !cpu_has_gicv3 ) + { + dprintk(XENLOG_ERR, "GICv3: driver requires system register support\n"); + return -ENODEV; + } + + gicv3_dt_init(); + + gicv3.map_dbase = ioremap_nocache(dbase, SZ_64K); + if ( !gicv3.map_dbase ) + panic("GICv3: Failed to ioremap for GIC distributor\n"); + + reg = readl_relaxed(GICD + GICD_PIDR2) & GIC_PIDR2_ARCH_MASK; + if ( reg != GIC_PIDR2_ARCH_GICv3 && reg != GIC_PIDR2_ARCH_GICv4 ) + panic("GICv3: no distributor detected\n"); + for ( i = 0; i < gicv3.rdist_count; i++ ) { /* map dbase & rdist regions */ @@ -1277,7 +1283,7 @@ static int __init gicv3_init(void) vgic_v3_setup_hw(dbase, gicv3.rdist_count, gicv3.rdist_regions, gicv3.rdist_stride); - gicv3_init_v2(node, dbase); + gicv3_init_v2(); spin_lock_init(&gicv3.lock); @@ -1317,7 +1323,7 @@ static const struct gic_hw_operations gicv3_ops = { .make_hwdom_dt_node = gicv3_make_hwdom_dt_node, }; -static int __init gicv3_preinit(struct dt_device_node *node, const void *data) +static int __init gicv3_dt_preinit(struct dt_device_node *node, const void *data) { gicv3_info.hw_version = GIC_V3; gicv3_info.node = node; @@ -1335,7 +1341,7 @@ static const struct dt_device_match gicv3_dt_match[] __initconst = DT_DEVICE_START(gicv3, "GICv3", DEVICE_GIC) .dt_match = gicv3_dt_match, - .init = gicv3_preinit, + .init = gicv3_dt_preinit, DT_DEVICE_END /*