From patchwork Fri Mar 4 06:15:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 63511 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp291842lbc; Thu, 3 Mar 2016 22:18:56 -0800 (PST) X-Received: by 10.140.168.85 with SMTP id o82mr2399210qho.75.1457072336436; Thu, 03 Mar 2016 22:18:56 -0800 (PST) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id g203si2348579qhg.1.2016.03.03.22.18.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 Mar 2016 22:18:56 -0800 (PST) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xen.org with esmtp (Exim 4.84) (envelope-from ) id 1abj33-0005P6-4j; Fri, 04 Mar 2016 06:17:13 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.84) (envelope-from ) id 1abj31-0005Oc-RN for xen-devel@lists.xen.org; Fri, 04 Mar 2016 06:17:11 +0000 Received: from [85.158.137.68] by server-6.bemta-3.messagelabs.com id FD/E0-23864-76829D65; Fri, 04 Mar 2016 06:17:11 +0000 X-Env-Sender: zhaoshenglong@huawei.com X-Msg-Ref: server-13.tower-31.messagelabs.com!1457072223!26274050!1 X-Originating-IP: [58.251.152.64] X-SpamReason: No, hits=0.5 required=7.0 tests=BODY_RANDOM_LONG X-StarScan-Received: X-StarScan-Version: 8.11; banners=-,-,- X-VirusChecked: Checked Received: (qmail 899 invoked from network); 4 Mar 2016 06:17:08 -0000 Received: from szxga01-in.huawei.com (HELO szxga01-in.huawei.com) (58.251.152.64) by server-13.tower-31.messagelabs.com with RC4-SHA encrypted SMTP; 4 Mar 2016 06:17:08 -0000 Received: from 172.24.1.50 (EHLO szxeml428-hub.china.huawei.com) ([172.24.1.50]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DFX12078; Fri, 04 Mar 2016 14:16:52 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by szxeml428-hub.china.huawei.com (10.82.67.183) with Microsoft SMTP Server id 14.3.235.1; Fri, 4 Mar 2016 14:16:25 +0800 From: Shannon Zhao To: Date: Fri, 4 Mar 2016 14:15:34 +0800 Message-ID: <1457072152-16128-5-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1457072152-16128-1-git-send-email-zhaoshenglong@huawei.com> References: <1457072152-16128-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020201.56D92855.00BD, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 020d1a6f288f5a174a05f4406d2676b9 Cc: hangaohuai@huawei.com, stefano.stabellini@citrix.com, shannon.zhao@linaro.org, zhaoshenglong@huawei.com Subject: [Xen-devel] [PATCH v5 04/22] arm/gic: Add a new callback for creating MADT table for Dom0 X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" From: Shannon Zhao Add a new member in gic_hw_operations which is used to creat MADT table for Dom0. Signed-off-by: Shannon Zhao Reviewed-by: Stefano Stabellini --- xen/arch/arm/gic-v2.c | 34 ++++++++++++++++++++++++++++++++++ xen/arch/arm/gic-v3.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ xen/arch/arm/gic.c | 5 +++++ xen/include/asm-arm/gic.h | 3 +++ 4 files changed, 89 insertions(+) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 0fcb894..02db5f2 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -685,6 +685,35 @@ static void __init gicv2_dt_init(void) } #ifdef CONFIG_ACPI +static u32 gicv2_make_hwdom_madt(const struct domain *d, u32 offset) +{ + struct acpi_subtable_header *header; + struct acpi_madt_generic_interrupt *host_gicc, *gicc; + u32 i, size, table_len = 0; + u8 *base_ptr = d->arch.efi_acpi_table + offset; + + header = acpi_table_get_entry_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT, 0); + if ( !header ) + panic("Can't get GICC entry"); + host_gicc = container_of(header, struct acpi_madt_generic_interrupt, + header); + + size = sizeof(struct acpi_madt_generic_interrupt); + /* Add Generic Interrupt */ + for ( i = 0; i < d->max_vcpus; i++ ) + { + gicc = (struct acpi_madt_generic_interrupt *)(base_ptr + table_len); + ACPI_MEMCPY(gicc, host_gicc, size); + gicc->cpu_interface_number = i; + gicc->uid = i; + gicc->flags = ACPI_MADT_ENABLED; + gicc->arm_mpidr = vcpuid_to_vaffinity(i); + table_len += size; + } + + return table_len; +} + static int __init gic_acpi_parse_madt_cpu(struct acpi_subtable_header *header, const unsigned long end) @@ -776,6 +805,10 @@ static void __init gicv2_acpi_init(void) } #else static void __init gicv2_acpi_init(void) { } +static u32 gicv2_make_hwdom_madt(const struct domain *d, u32 offset) +{ + return 0; +} #endif static int __init gicv2_init(void) @@ -868,6 +901,7 @@ const static struct gic_hw_operations gicv2_ops = { .read_vmcr_priority = gicv2_read_vmcr_priority, .read_apr = gicv2_read_apr, .make_hwdom_dt_node = gicv2_make_hwdom_dt_node, + .make_hwdom_madt = gicv2_make_hwdom_madt, }; /* Set up the GIC */ diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index f83fd88..d9fce4b 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -1236,6 +1236,48 @@ static void __init gicv3_dt_init(void) } #ifdef CONFIG_ACPI +static u32 gicv3_make_hwdom_madt(const struct domain *d, u32 offset) +{ + struct acpi_subtable_header *header; + struct acpi_madt_generic_interrupt *host_gicc, *gicc; + struct acpi_madt_generic_redistributor *gicr; + u8 *base_ptr = d->arch.efi_acpi_table + offset; + u32 i, table_len = 0, size; + + /* Add Generic Interrupt */ + header = acpi_table_get_entry_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT, 0); + if ( !header ) + panic("Can't get GICC entry"); + host_gicc = container_of(header, struct acpi_madt_generic_interrupt, + header); + + size = sizeof(struct acpi_madt_generic_interrupt); + for ( i = 0; i < d->max_vcpus; i++ ) + { + gicc = (struct acpi_madt_generic_interrupt *)(base_ptr + table_len); + ACPI_MEMCPY(gicc, host_gicc, size); + gicc->cpu_interface_number = i; + gicc->uid = i; + gicc->flags = ACPI_MADT_ENABLED; + gicc->arm_mpidr = vcpuid_to_vaffinity(i); + table_len += size; + } + + /* Add Generic Redistributor */ + size = sizeof(struct acpi_madt_generic_redistributor); + for ( i = 0; i < d->arch.vgic.nr_regions; i++ ) + { + gicr = (struct acpi_madt_generic_redistributor *)(base_ptr + table_len); + gicr->header.type = ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR; + gicr->header.length = size; + gicr->base_address = d->arch.vgic.rdist_regions[i].base; + gicr->length = d->arch.vgic.rdist_regions[i].size; + table_len += size; + } + + return table_len; +} + static int __init gic_acpi_parse_madt_cpu(struct acpi_subtable_header *header, const unsigned long end) @@ -1380,6 +1422,10 @@ static void __init gicv3_acpi_init(void) } #else static void __init gicv3_acpi_init(void) { } +static u32 gicv3_make_hwdom_madt(const struct domain *d, u32 offset) +{ + return 0; +} #endif /* Set up the GIC */ @@ -1474,6 +1520,7 @@ static const struct gic_hw_operations gicv3_ops = { .read_apr = gicv3_read_apr, .secondary_init = gicv3_secondary_cpu_init, .make_hwdom_dt_node = gicv3_make_hwdom_dt_node, + .make_hwdom_madt = gicv3_make_hwdom_madt, }; static int __init gicv3_dt_preinit(struct dt_device_node *node, const void *data) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index fbbe37f..6d32432 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -739,6 +739,11 @@ int gic_make_hwdom_dt_node(const struct domain *d, return gic_hw_ops->make_hwdom_dt_node(d, gic, fdt); } +u32 gic_make_hwdom_madt(const struct domain *d, u32 offset) +{ + return gic_hw_ops->make_hwdom_madt(d, offset); +} + /* * Local variables: * mode: C diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index 7bd06e1..4cf003d 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -358,12 +358,15 @@ struct gic_hw_operations { /* Create GIC node for the hardware domain */ int (*make_hwdom_dt_node)(const struct domain *d, const struct dt_device_node *gic, void *fdt); + /* Create MADT table for the hardware domain */ + u32 (*make_hwdom_madt)(const struct domain *d, u32 offset); }; void register_gic_ops(const struct gic_hw_operations *ops); int gic_make_hwdom_dt_node(const struct domain *d, const struct dt_device_node *gic, void *fdt); +u32 gic_make_hwdom_madt(const struct domain *d, u32 offset); #endif /* __ASSEMBLY__ */ #endif