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[192.237.175.120]) by mx.google.com with ESMTPS id r84si4506479itd.16.2016.07.14.09.24.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Jul 2016 09:24:39 -0700 (PDT) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bNjP6-0003bS-IZ; Thu, 14 Jul 2016 16:22:24 +0000 Received: from mail6.bemta6.messagelabs.com ([85.158.143.247]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bNjP5-0003Yq-R4 for xen-devel@lists.xen.org; Thu, 14 Jul 2016 16:22:23 +0000 Received: from [85.158.143.35] by server-1.bemta-6.messagelabs.com id 40/C8-09256-F3CB7875; Thu, 14 Jul 2016 16:22:23 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGLMWRWlGSWpSXmKPExsVysyfVTddmT3u 4we+VihZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa8b361sZC65xVKyfuY+9gbGfvYuRi0NIYBOj xO8tsxkhnNOMEleP32PuYuTkYBPQlLjz+RMTiC0iIC1x7fNlRhCbWaBQ4vrZJ2wgtrBAiMTz9 TvZQWwWAVWJ1u2PWEBsXgEXidYFO8DqJQTkJE4em8wKYnMKuEqs2P0JrFcIqGbu05vMExi5Fz AyrGJUL04tKkst0jXUSyrKTM8oyU3MzNE1NDDTy00tLk5MT81JTCrWS87P3cQI9C8DEOxg3Pn c6RCjJAeTkiivdn9buBBfUn5KZUZicUZ8UWlOavEhRhkODiUJ3r7d7eFCgkWp6akVaZk5wECD SUtw8CiJ8EaBpHmLCxJzizPTIVKnGBWlxHnjQBICIImM0jy4NlhwX2KUlRLmZQQ6RIinILUoN 7MEVf4VozgHo5IwrxnIFJ7MvBK46a+AFjMBLbY2B1tckoiQkmpg9G4/cP0v0wGOTmnJhvvr+K UKJ6qazz0R8qD/fI7/xSs6Sz6rFTmxz7iT93vOusb913fLLtTQTXizJFK82vF+Amf6zFy/Ut9 j/YYMnIetpDfxMKxYqz+pc7H7mSj1e57dP39v9Eis2PdufjhTyDZ1qcKQN98u5t9WU6lz2vxP PMir8NksvVgDJZbijERDLeai4kQAUAU79GkCAAA= X-Env-Sender: julien.grall@arm.com X-Msg-Ref: server-9.tower-21.messagelabs.com!1468513340!23920841!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 8.77; banners=-,-,- X-VirusChecked: Checked Received: (qmail 39882 invoked from network); 14 Jul 2016 16:22:20 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-9.tower-21.messagelabs.com with SMTP; 14 Jul 2016 16:22:20 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6D0BE43E; Thu, 14 Jul 2016 09:23:22 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.215.28]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DC8963F4F6; Thu, 14 Jul 2016 09:22:15 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Thu, 14 Jul 2016 17:22:01 +0100 Message-Id: <1468513325-29492-6-git-send-email-julien.grall@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1468513325-29492-1-git-send-email-julien.grall@arm.com> References: <1468513325-29492-1-git-send-email-julien.grall@arm.com> Cc: Julien Grall , sstabellini@kernel.org, shankerd@codeaurora.org, steve.capper@arm.com Subject: [Xen-devel] [PATCH v2 5/9] xen/arm: gic: Document how gic_set_irq_type should be called X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" Changing the value of Int_config is UNPREDICTABLE when the corresponding interrupt is not disabled. The driver is assuming the interrupt will be disabled by the caller of gic_set_irq_type. Add an ASSERT to ensure it. Signed-off-by: Julien Grall Acked-by: Stefano Stabellini --- Changes in v2: - Add Stefano's acked-by --- xen/arch/arm/gic.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index b9371a7..72bb885 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -96,8 +96,14 @@ void gic_restore_state(struct vcpu *v) gic_restore_pending_irqs(v); } +/* desc->irq needs to be disabled before calling this function */ static void gic_set_irq_type(struct irq_desc *desc, unsigned int type) { + /* + * IRQ must be disabled before configuring it (see 4.3.13 in ARM IHI + * 0048B.b). We rely on the caller to do it. + */ + ASSERT(test_bit(_IRQ_DISABLED, &desc->status)); ASSERT(spin_is_locked(&desc->lock)); ASSERT(type != IRQ_TYPE_INVALID);