From patchwork Wed Mar 21 16:32:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 132233 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp2356318ljb; Wed, 21 Mar 2018 09:35:13 -0700 (PDT) X-Google-Smtp-Source: AG47ELtT3cfymvekL2j3Su0lO44zB9n8w24aGzp1CZ4ZM7eMYQPow9Nk1fJhr48alFUPhZwT8z2V X-Received: by 2002:a24:f685:: with SMTP id u127-v6mr4768738ith.131.1521650112873; Wed, 21 Mar 2018 09:35:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521650112; cv=none; d=google.com; s=arc-20160816; b=vMt1buOT7PxilZM/oRE5IwiKZLyW6NaEoyDKnLR3yC4/n1n6cr/3zK2P7Aw+viq3W0 p99Kn1DuQbwjtxYDejGjp0nXzwmu3e1UvTWbQJ7Cxb5Jcbp1rPgD4cWX0uiTX5Kl5HPo aYHpww2z/BE24B4DSgIXfVPiJwfrzfauTkXKLuS6Rowka05Pk7naJCmZkYXJjhi/gCl5 NMX3IRU4VZwWqb8kCxQmOHEl+Flf/75OI8vgqbdbTeyCfWqcFAeMudeFW02rrQEkG33N HSEvjwOnGVZBznWii3lZirJ9igOCJ0u/ycMH/mzo8hlGG0b+FPSh+hLop2F1KSIfPoun ie3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from :dkim-signature:arc-authentication-results; bh=b990bRi//Dksbgx5VAJO3Go1zC9L/m/9BFvsZDDxCQI=; b=t6kxRX7i6LNM4Tb6pBMpgHM5uqCVETavnTUC6Rab81i+vmoOyzNNFGGzAJszZvVrg/ 2KppPHTL5b4nphNSXl51/9yNgtUYXty2Qjdr3MV6pGB+FvCOIgSsovq7M3dDBKAOX950 +1z8S58dqU/AGCjlKUi09q+swISz+OrjtaLCKda1l1+n8VlJxqXflpuR8yvP9762xaO0 +7ZAsVlIgkznIq/Dn4ojdrCSm46J0sVfSEHHb4TSpGuefKXjlFd6wPos3TNILk9NDxEJ iGFjPDxTBd4n3bj8Ysi3U/jJE0mZEa9cd2Uv6qlEhStvXPwPp18tG9EUmCv5ivsExPIV +qxw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=OU9KtMR3; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id v186-v6si3517338itf.66.2018.03.21.09.35.12 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 21 Mar 2018 09:35:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=OU9KtMR3; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1eygg5-00035y-Mt; Wed, 21 Mar 2018 16:33:29 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1eygg0-0002u5-WB for xen-devel@lists.xenproject.org; Wed, 21 Mar 2018 16:33:25 +0000 X-Inumbo-ID: 89b07d06-2d25-11e8-9728-bc764e045a96 Received: from mail-wr0-x241.google.com (unknown [2a00:1450:400c:c0c::241]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 89b07d06-2d25-11e8-9728-bc764e045a96; Wed, 21 Mar 2018 17:33:08 +0100 (CET) Received: by mail-wr0-x241.google.com with SMTP id s10so5825167wra.13 for ; Wed, 21 Mar 2018 09:33:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZpcWBgjhGo5s0B50sbO2oQv3At8FYHfyo+zJke4XiJM=; b=OU9KtMR3RAd234elh8928p9wq7U3ekbkw/MGVt935OAIw4k1BFCzRXpnMMdIXZrrJm WHL6U9pA3J3i1j0MIR6WRN2xtgBbrVSI8hnbnJKyrtgt0hpAtT0uVyvNyp93UWPuVvLj WcnqbRvB0Swgm8UzdR8erTK9NfixXbqVrgqyw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZpcWBgjhGo5s0B50sbO2oQv3At8FYHfyo+zJke4XiJM=; b=QfHei0JFgkvUyKomB3OPOUnoy2q8gBgsRi/IEz/OcDLqatU1Ph/5GmvYS54CacpR8G AOkGjiBo70HitLVMs9A2wNTPs7/y22cLWzvfhasovWo4fniPqHICewVPDQjCpLoJHo24 oQ94yQ2J9VQVYjUm42j2BqwtktI08xJrDmrMdWfWs6F9cYDfNs+OnSb5aF90hGRjWHqU WSVtUbGeBhfpyCzG+Cp8ElMg6tyacOa6wPUjOILDpQu+dDilpr3rhgm/G+pIs9xsjA0Z cXxSdZBp69aR9Bfvc8AismMBr+/1Q2w/KUJ+5DrEJ9z18pl8rjxHNXztBK3SkAA25DzC Hptw== X-Gm-Message-State: AElRT7Gqvw1A0nZ+wESk3vTzD87WTIhoFfDCPG0Ai6EQkAcz9+Be5Z+M gXX402kU73XM1dHfi4NueslDN0/rhQU= X-Received: by 10.223.186.75 with SMTP id t11mr9072806wrg.155.1521650002447; Wed, 21 Mar 2018 09:33:22 -0700 (PDT) Received: from e104803-lin.lan (mail.andrep.de. [217.160.17.100]) by smtp.gmail.com with ESMTPSA id n64sm4423724wmd.11.2018.03.21.09.33.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 21 Mar 2018 09:33:22 -0700 (PDT) From: Andre Przywara To: Julien Grall , Stefano Stabellini Date: Wed, 21 Mar 2018 16:32:28 +0000 Message-Id: <20180321163235.12529-33-andre.przywara@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180321163235.12529-1-andre.przywara@linaro.org> References: <20180321163235.12529-1-andre.przywara@linaro.org> Subject: [Xen-devel] [PATCH v3 32/39] ARM: new VGIC: Implement arch_move_irqs() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: xen-devel@lists.xenproject.org, Andre Przywara MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" When a VCPU moves to another CPU, we need to adjust the target affinity of any hardware mapped vIRQs, to observe our "physical-follows-virtual" policy. Implement arch_move_irqs() to adjust the physical affinity of all hardware mapped vIRQs targetting this VCPU. Signed-off-by: Andre Przywara Reviewed-by: Julien Grall Acked-by: Stefano Stabellini --- xen/arch/arm/vgic/vgic.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c index ffab0b2635..23b8abfc5e 100644 --- a/xen/arch/arm/vgic/vgic.c +++ b/xen/arch/arm/vgic/vgic.c @@ -791,6 +791,45 @@ void gic_dump_vgic_info(struct vcpu *v) spin_unlock_irqrestore(&v->arch.vgic.ap_list_lock, flags); } +/** + * arch_move_irqs() - migrate the physical affinity of hardware mapped vIRQs + * @v: the vCPU, already assigned to the new pCPU + * + * arch_move_irqs() updates the physical affinity of all virtual IRQs + * targetting this given vCPU. This only affects hardware mapped IRQs. The + * new pCPU to target is already set in v->processor. + * This is called by the core code after a vCPU has been migrated to a new + * physical CPU. + */ +void arch_move_irqs(struct vcpu *v) +{ + struct domain *d = v->domain; + unsigned int i; + + /* We only target SPIs with this function */ + for ( i = 0; i < d->arch.vgic.nr_spis; i++ ) + { + struct vgic_irq *irq = vgic_get_irq(d, NULL, i + VGIC_NR_PRIVATE_IRQS); + unsigned long flags; + + if ( !irq ) + continue; + + spin_lock_irqsave(&irq->irq_lock, flags); + + /* only vIRQs that are not on a vCPU yet , but targetting this vCPU */ + if ( irq->hw && !irq->vcpu && irq->target_vcpu == v) + { + irq_desc_t *desc = irq_to_desc(irq->hwintid); + + irq_set_affinity(desc, cpumask_of(v->processor)); + } + + spin_unlock_irqrestore(&irq->irq_lock, flags); + vgic_put_irq(d, irq); + } +} + struct irq_desc *vgic_get_hw_irq_desc(struct domain *d, struct vcpu *v, unsigned int virq) {