From patchwork Tue May 14 12:24:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 164184 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp2555116ili; Tue, 14 May 2019 05:26:13 -0700 (PDT) X-Google-Smtp-Source: APXvYqxpVCqGSA1Fz5N+H8+urzwHWBNyQq93+6tCyhtEMobtDR1iOiTA3Mv15HsD48nO7FYofDij X-Received: by 2002:a02:c807:: with SMTP id p7mr23768443jao.38.1557836773741; Tue, 14 May 2019 05:26:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557836773; cv=none; d=google.com; s=arc-20160816; b=btjHiyscC+d5+8PcOqKOobK823fEaMZZ+xq8GU2UsFeAWAjltJTycfkA3Uvd5t5dDU oDuZBCT+Cngc7W7dyJGmR2RTiOef+sahbXfWg/J5WclzZFmqb2HeF+wu2EN+h1vw4EX7 SDtsdMXRGf7KWiREAnnavuZyygUKmhi7+rMh9Ln0V6L2IUz9x5mXm2fiVDIIdfB7BRoi 7Xu9bRAPgU9yyMp4W1vOsiIBKoteoLdfNRJiO5euOWkPCdQE7uIG61gVkZip+P/zykPc WW7OzcIKFnGnL4mOj1kTjwzIdfjPKiqqR52I5QWG1T30mGvcSICE7QJgKBdRnisloRLu 3fZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=kIQ8j07N6sGKRipePn8wYBH0jmpLKCu9DJDn+JV6ypU=; b=ZxdCpvCw48W/ZODSYLZFUvfFzSjSuaiX+pSUv6/9xrpqDaxfzqrPZXZOem25cn5Xv+ OBfbD9SzFo5cqGH0TvF71DmRPNgm4AVcV9ZBhirq/ub7lrUD+z4JPk3U6o4l56g9tiVS lGa42XSes8YJxYoIHIneTRGUjEm6Pyk+w9BWD508IhEuHlQFlGX2yJJNWdLRWIjc6X9w eKJtgZKEwE3Q4RJ60F3DRNbX2sJnR+a7nxyqqQNJo9IQkJEULc3gxKeCM5iLgCGvSaQ2 J2BBygtEMpLSFpgosNGJ0FRuHGAqvSHLcFpUE9WT91a0tNIB04nrAkKSsOcGep6RIM/q XgUw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id h12si1491591itl.4.2019.05.14.05.26.13 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2019 05:26:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hQWUp-0002vG-9c; Tue, 14 May 2019 12:25:27 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hQWUn-0002ry-MV for xen-devel@lists.xenproject.org; Tue, 14 May 2019 12:25:25 +0000 X-Inumbo-ID: 597634ac-7643-11e9-abeb-07f7ac8ed8f0 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id 597634ac-7643-11e9-abeb-07f7ac8ed8f0; Tue, 14 May 2019 12:25:24 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 865E7341; Tue, 14 May 2019 05:25:24 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 769D33F71E; Tue, 14 May 2019 05:25:23 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Tue, 14 May 2019 13:24:52 +0100 Message-Id: <20190514122456.28559-16-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190514122456.28559-1-julien.grall@arm.com> References: <20190514122456.28559-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH MM-PART2 RESEND v2 15/19] xen/arm: mm: Introduce DEFINE_PAGE_TABLE{, S} and use it X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Oleksandr_Tyshchenko@epam.com, Julien Grall , Stefano Stabellini , Andrii_Anisov@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" We have multiple static page-tables defined in arch/arm/mm.c. The current way to define them is difficult to read and does not help when making modification. Two new helpers DEFINE_PAGE_TABLES (to define multiple page-tables) and DEFINE_PAGE_TABLE (alias of DEFINE_PAGE_TABLES(..., 1)) are introduced and now used to define static page-tables. Note that DEFINE_PAGE_TABLES() alignment differs from what is currently used for allocating page-tables. This is fine because page-tables are only required to be aligned to a page-size. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- Changes in v2: - Patch in replacement of "Use the shorter version __aligned(PAGE_SIZE) to align page-tables". --- xen/arch/arm/mm.c | 32 ++++++++++++++++++-------------- 1 file changed, 18 insertions(+), 14 deletions(-) diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index 6db7dda0da..9a5f2e1c3f 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -50,6 +50,11 @@ struct domain *dom_xen, *dom_io, *dom_cow; #undef mfn_to_virt #define mfn_to_virt(mfn) __mfn_to_virt(mfn_x(mfn)) +#define DEFINE_PAGE_TABLES(name, nr) \ +lpae_t __aligned(PAGE_SIZE) name[LPAE_ENTRIES * (nr)] + +#define DEFINE_PAGE_TABLE(name) DEFINE_PAGE_TABLES(name, 1) + /* Static start-of-day pagetables that we use before the allocators * are up. These are used by all CPUs during bringup before switching * to the CPUs own pagetables. @@ -73,13 +78,13 @@ struct domain *dom_xen, *dom_io, *dom_cow; * Finally, if EARLY_PRINTK is enabled then xen_fixmap will be mapped * by the CPU once it has moved off the 1:1 mapping. */ -lpae_t boot_pgtable[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +DEFINE_PAGE_TABLE(boot_pgtable); #ifdef CONFIG_ARM_64 -lpae_t boot_first[LPAE_ENTRIES] __attribute__((__aligned__(4096))); -lpae_t boot_first_id[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +DEFINE_PAGE_TABLE(boot_first); +DEFINE_PAGE_TABLE(boot_first_id); #endif -lpae_t boot_second[LPAE_ENTRIES] __attribute__((__aligned__(4096))); -lpae_t boot_third[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +DEFINE_PAGE_TABLE(boot_second); +DEFINE_PAGE_TABLE(boot_third); /* Main runtime page tables */ @@ -93,8 +98,8 @@ lpae_t boot_third[LPAE_ENTRIES] __attribute__((__aligned__(4096))); #ifdef CONFIG_ARM_64 #define HYP_PT_ROOT_LEVEL 0 -lpae_t xen_pgtable[LPAE_ENTRIES] __attribute__((__aligned__(4096))); -lpae_t xen_first[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +static DEFINE_PAGE_TABLE(xen_pgtable); +static DEFINE_PAGE_TABLE(xen_first); #define THIS_CPU_PGTABLE xen_pgtable #else #define HYP_PT_ROOT_LEVEL 1 @@ -107,17 +112,16 @@ static DEFINE_PER_CPU(lpae_t *, xen_pgtable); * DOMHEAP_VIRT_START...DOMHEAP_VIRT_END in 2MB chunks. */ static DEFINE_PER_CPU(lpae_t *, xen_dommap); /* Root of the trie for cpu0, other CPU's PTs are dynamically allocated */ -lpae_t cpu0_pgtable[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +static DEFINE_PAGE_TABLE(cpu0_pgtable); /* cpu0's domheap page tables */ -lpae_t cpu0_dommap[LPAE_ENTRIES*DOMHEAP_SECOND_PAGES] - __attribute__((__aligned__(4096*DOMHEAP_SECOND_PAGES))); +static DEFINE_PAGE_TABLES(cpu0_dommap, DOMHEAP_SECOND_PAGES); #endif #ifdef CONFIG_ARM_64 /* The first page of the first level mapping of the xenheap. The * subsequent xenheap first level pages are dynamically allocated, but * we need this one to bootstrap ourselves. */ -lpae_t xenheap_first_first[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +static DEFINE_PAGE_TABLE(xenheap_first_first); /* The zeroeth level slot which uses xenheap_first_first. Used because * setup_xenheap_mappings otherwise relies on mfn_to_virt which isn't * valid for a non-xenheap mapping. */ @@ -131,12 +135,12 @@ static __initdata int xenheap_first_first_slot = -1; * addresses from 0 to 0x7fffffff. Offsets into it are calculated * with second_linear_offset(), not second_table_offset(). */ -lpae_t xen_second[LPAE_ENTRIES*2] __attribute__((__aligned__(4096*2))); +static DEFINE_PAGE_TABLES(xen_second, 2); /* First level page table used for fixmap */ -lpae_t xen_fixmap[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +DEFINE_PAGE_TABLE(xen_fixmap); /* First level page table used to map Xen itself with the XN bit set * as appropriate. */ -static lpae_t xen_xenmap[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +static DEFINE_PAGE_TABLE(xen_xenmap); /* Non-boot CPUs use this to find the correct pagetables. */ uint64_t init_ttbr;