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[192.237.175.120]) by mx.google.com with ESMTPS id 133si183420ity.66.2019.06.10.12.33.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ22-0007nm-Mn; Mon, 10 Jun 2019 19:32:38 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ21-0007m8-8C for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:37 +0000 X-Inumbo-ID: 7feffa3f-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 7feffa3f-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:35 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B6D97346; Mon, 10 Jun 2019 12:32:35 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CED6C3F73C; Mon, 10 Jun 2019 12:32:34 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:12 +0100 Message-Id: <20190610193215.23704-15-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 14/17] xen/arm64: head: Remove ID map as soon as it is not used X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The ID map may clash with other parts of the Xen virtual memory layout. At the moment, Xen is handling the clash by only creating a mapping to the runtime virtual address before enabling the MMU. The rest of the mappings (such as the fixmap) will be mapped after the MMU is enabled. However, the code doing the mapping is not safe as it replace mapping without using the Break-Before-Make sequence. As the ID map can be anywhere in the memory, it is easier to remove all the entries added as soon as the ID map is not used rather than adding the Break-Before-Make sequence everywhere. It is difficult to track where exactly the ID map was created without a full rework of create_page_tables(). Instead, introduce a new function remove_id_map() will look where is the top-level entry for the ID map and remove it. The new function is only called for the boot CPU. Secondary CPUs will switch directly to the runtime page-tables so there are no need to remove the ID mapping. Note that this still doesn't make the Secondary CPUs path safe but it is not making it worst. --- Note that the comment refers to the patch "xen/arm: tlbflush: Rework TLB helpers" under review (see [1]). Furthermore, it is very likely we will need to re-introduce the ID map to cater secondary CPUs boot and suspend/resume. For now, the attempt is to make boot CPU path fully Arm Arm compliant. [1] https://lists.xenproject.org/archives/html/xen-devel/2019-05/msg01134.html --- xen/arch/arm/arm64/head.S | 86 ++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 71 insertions(+), 15 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 192af3e8a2..96e85f8834 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -300,6 +300,13 @@ real_start_efi: ldr x0, =primary_switched br x0 primary_switched: + /* + * The ID map may clash with other parts of the Xen virtual memory + * layout. As it is not used anymore, remove it completely to + * avoid having to worry about replacing existing mapping + * afterwards. + */ + bl remove_id_map bl setup_fixmap #ifdef CONFIG_EARLY_PRINTK /* Use a virtual address to access the UART. */ @@ -632,10 +639,68 @@ enable_mmu: ret ENDPROC(enable_mmu) +/* + * Remove the ID map for the page-tables. It is not easy to keep track + * where the ID map was mapped, so we will look for the top-level entry + * exclusive to the ID Map and remove it. + * + * Inputs: + * x19: paddr(start) + * + * Clobbers x0 - x1 + */ +remove_id_map: + /* + * Find the zeroeth slot used. Remove the entry from zeroeth + * table if the slot is not 0. For slot 0, the ID map was either + * done in first or second table. + */ + lsr x1, x19, #ZEROETH_SHIFT /* x1 := zeroeth slot */ + cbz x1, 1f + /* It is not in slot 0, remove the entry */ + ldr x0, =boot_pgtable /* x0 := root table */ + str xzr, [x0, x1, lsl #3] + b id_map_removed + +1: + /* + * Find the first slot used. Remove the entry for the first + * table if the slot is not 0. For slot 0, the ID map was done + * in the second table. + */ + lsr x1, x19, #FIRST_SHIFT + and x1, x1, #LPAE_ENTRY_MASK /* x1 := first slot */ + cbz x1, 1f + /* It is not in slot 0, remove the entry */ + ldr x0, =boot_first /* x0 := first table */ + str xzr, [x0, x1, lsl #3] + b id_map_removed + +1: + /* + * Find the second slot used. Remove the entry for the first + * table if the slot is not 1 (runtime Xen mapping is 2M - 4M). + * For slot 1, it means the ID map was not created. + */ + lsr x1, x19, #SECOND_SHIFT + and x1, x1, #LPAE_ENTRY_MASK /* x1 := first slot */ + cmp x1, #1 + beq id_map_removed + /* It is not in slot 1, remove the entry */ + ldr x0, =boot_second /* x0 := second table */ + str xzr, [x0, x1, lsl #3] + +id_map_removed: + /* See asm-arm/arm64/flushtlb.h for the explanation of the sequence. */ + dsb nshst + tlbi alle2 + dsb nsh + isb + + ret +ENDPROC(remove_id_map) + setup_fixmap: - /* Now we can install the fixmap and dtb mappings, since we - * don't need the 1:1 map any more */ - dsb sy #if defined(CONFIG_EARLY_PRINTK) /* Fixmap is only used by early printk */ /* Add UART to the fixmap table */ ldr x1, =xen_fixmap /* x1 := vaddr (xen_fixmap) */ @@ -653,19 +718,10 @@ setup_fixmap: ldr x1, =FIXMAP_ADDR(0) lsr x1, x1, #(SECOND_SHIFT - 3) /* x1 := Slot for FIXMAP(0) */ str x2, [x4, x1] /* Map it in the fixmap's slot */ -#endif - /* - * Flush the TLB in case the 1:1 mapping happens to clash with - * the virtual addresses used by the fixmap or DTB. - */ - dsb sy /* Ensure any page table updates made above - * have occurred. */ - - isb - tlbi alle2 - dsb sy /* Ensure completion of TLB flush */ - isb + /* Ensure any page table updates made above have occurred */ + dsb nshst +#endif ret ENDPROC(setup_fixmap)