From patchwork Thu Jul 25 15:21:31 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 18578 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-qe0-f70.google.com (mail-qe0-f70.google.com [209.85.128.70]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 11E7125E88 for ; Thu, 25 Jul 2013 15:21:49 +0000 (UTC) Received: by mail-qe0-f70.google.com with SMTP id 2sf760906qea.5 for ; Thu, 25 Jul 2013 08:21:48 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:x-beenthere:x-forwarded-to:x-forwarded-for :delivered-to:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-google-group-id:list-post:list-help:list-archive:list-unsubscribe; bh=M93eUL6incHExkORlwvAeiTAVR21mK0U84LtJclocOY=; b=JPuY4zCEcetXRqqb6o2rzvEDYSIXaXcFEodRsIWG5TjffqjDFEvFIKaR8N/O9FCeLS FWm2Ii6XaTfklGyLcwqJkA42SYth3WSmvbY3hEFg/9367GLfGX/lReLrttA462Jnvhpi P29WS0+iZ/3FGwMXbeFWjPCSxDykyK/MMZ1kPNBMmRBcIyXzCIaONBnBWtggdoOXbC5Z qylnNsqTOotRI2Vln0vRitTl1iK3yva/Y+4ydByx3FVN6IfTczc363Feg8O9Loj4WtxI qtwnWbDlB1HJanKcKClgN7OMO6HfvF3OPkimnsRdlVLdQw8a9DGv1QYBIx4AFDTed2QF rwTg== X-Received: by 10.236.91.4 with SMTP id g4mr23546366yhf.30.1374765708717; Thu, 25 Jul 2013 08:21:48 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.0.132 with SMTP id 4ls587249qee.90.gmail; Thu, 25 Jul 2013 08:21:48 -0700 (PDT) X-Received: by 10.220.122.138 with SMTP id l10mr857163vcr.45.1374765708614; Thu, 25 Jul 2013 08:21:48 -0700 (PDT) Received: from mail-vc0-f171.google.com (mail-vc0-f171.google.com [209.85.220.171]) by mx.google.com with ESMTPS id q4si470256vcf.32.2013.07.25.08.21.48 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 25 Jul 2013 08:21:48 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.220.171 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.171; Received: by mail-vc0-f171.google.com with SMTP id ij15so211771vcb.16 for ; Thu, 25 Jul 2013 08:21:48 -0700 (PDT) X-Received: by 10.58.45.70 with SMTP id k6mr18406932vem.9.1374765708527; Thu, 25 Jul 2013 08:21:48 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.58.165.8 with SMTP id yu8csp82786veb; Thu, 25 Jul 2013 08:21:48 -0700 (PDT) X-Received: by 10.194.242.69 with SMTP id wo5mr31713620wjc.30.1374765707433; Thu, 25 Jul 2013 08:21:47 -0700 (PDT) Received: from mail-wi0-f177.google.com (mail-wi0-f177.google.com [209.85.212.177]) by mx.google.com with ESMTPS id wo6si18861967wjc.36.2013.07.25.08.21.47 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 25 Jul 2013 08:21:47 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.212.177 is neither permitted nor denied by best guess record for domain of julien.grall@linaro.org) client-ip=209.85.212.177; Received: by mail-wi0-f177.google.com with SMTP id ey16so1937777wid.4 for ; Thu, 25 Jul 2013 08:21:47 -0700 (PDT) X-Received: by 10.180.36.238 with SMTP id t14mr2525651wij.29.1374765707004; Thu, 25 Jul 2013 08:21:47 -0700 (PDT) Received: from belegaer.uk.xensource.com. (firewall.ctxuk.citrix.com. [46.33.159.2]) by mx.google.com with ESMTPSA id nb12sm2536766wic.3.2013.07.25.08.21.45 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 25 Jul 2013 08:21:46 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Cc: ian.campbell@citrix.com, Stefano.Stabellini@eu.citrix.com, patches@linaro.org, Julien Grall Subject: [PATCH v2 2/3] xen/arm: Allow secondary cpus to start in THUMB Date: Thu, 25 Jul 2013 16:21:31 +0100 Message-Id: <1374765692-31370-3-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1374765692-31370-1-git-send-email-julien.grall@linaro.org> References: <1374765692-31370-1-git-send-email-julien.grall@linaro.org> X-Gm-Message-State: ALoCoQmihaNrNSY8p+wTENOm9jhD7hwW+IcoM7fS9klYgHopz/Ck2blAXepuZWGIy63S31+3ElLX X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.171 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Unlike bx, eret will not update the instruction set (THUMB,ARM) according to the return address. This will result to an unpredicable behaviour for the processor if the address doesn't match the right instruction set. When the kernel is compiled with THUMB2, THUMB bit needs to be set in CPSR for the secondary cpus. Signed-off-by: Julien Grall --- Changes in v2: - Return PSCI_EINVAL if an aarch64 guest tries to use THUMB set --- xen/arch/arm/psci.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index 18feead..200769c 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -24,6 +24,7 @@ int do_psci_cpu_on(uint32_t vcpuid, register_t entry_point) struct domain *d = current->domain; struct vcpu_guest_context *ctxt; int rc; + int is_thumb = entry_point & 1; if ( (vcpuid < 0) || (vcpuid >= MAX_VIRT_CPUS) ) return PSCI_EINVAL; @@ -31,6 +32,10 @@ int do_psci_cpu_on(uint32_t vcpuid, register_t entry_point) if ( vcpuid >= d->max_vcpus || (v = d->vcpu[vcpuid]) == NULL ) return PSCI_EINVAL; + /* THUMB set is not allowed with 64-bit domain */ + if ( is_pv64_domain(d) && is_thumb ) + return PSCI_EINVAL; + if ( (ctxt = alloc_vcpu_guest_context()) == NULL ) return PSCI_DENIED; @@ -43,6 +48,9 @@ int do_psci_cpu_on(uint32_t vcpuid, register_t entry_point) ctxt->ttbr1 = 0; ctxt->ttbcr = 0; /* Defined Reset Value */ ctxt->user_regs.cpsr = PSR_GUEST_INIT; + /* Start the VCPU with THUMB set if it's requested by the kernel */ + if ( is_thumb ) + ctxt->user_regs.cpsr |= PSR_THUMB; ctxt->flags = VGCF_online; domain_lock(d);