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([185.25.64.249]) by mx.google.com with ESMTPSA id q5sm2409641wiz.3.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 26 Sep 2013 04:09:52 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Cc: stefano.stabellini@eu.citrix.com, ian.campbell@citrix.com, patches@linaro.org, Julien Grall Subject: [PATCH v5 3/7] xen/arm: Initialize correctly IRQ routing Date: Thu, 26 Sep 2013 12:09:37 +0100 Message-Id: <1380193781-17474-4-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1380193781-17474-1-git-send-email-julien.grall@linaro.org> References: <1380193781-17474-1-git-send-email-julien.grall@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , When Xen initialize the GIC distributor, we need to route all the IRQs to the boot CPU. The CPU ID can differ between Xen and the GIC. When ITARGETSR0 is read, each field will return a value that corresponds only to the processor reading the register. So Xen can use the PPI 0 to initialize correctly the routing. Signed-off-by: Julien Grall Acked-by: Ian Campbell --- xen/arch/arm/gic.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 091eb36..b969d23 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -258,9 +258,10 @@ void gic_route_dt_irq(const struct dt_irq *irq, const cpumask_t *cpu_mask, static void __init gic_dist_init(void) { uint32_t type; - uint32_t cpumask = 1 << smp_processor_id(); + uint32_t cpumask; int i; + cpumask = GICD[GICD_ITARGETSR] & 0xff; cpumask |= cpumask << 8; cpumask |= cpumask << 16;