diff -r 1ff9aba7c951 -r d9e6ebc7ed59 common/autoconf/platform.m4
--- a/common/autoconf/platform.m4	Fri Sep 27 11:00:18 2013 +0100
+++ b/common/autoconf/platform.m4	Fri Sep 27 13:23:09 2013 +0100
@@ -339,9 +339,6 @@
     fi
     AC_SUBST(DEFINE_CROSS_COMPILE_ARCH)
 
-        ;;
-      aarch64)
-        ZERO_ARCHFLAG=""
     # ZERO_ARCHDEF is used to enable architecture-specific code
     case "${OPENJDK_TARGET_CPU}" in
       ppc*)    ZERO_ARCHDEF=PPC   ;;
diff -r 1ff9aba7c951 -r d9e6ebc7ed59 common/autoconf/toolchain.m4
--- a/common/autoconf/toolchain.m4	Fri Sep 27 11:00:18 2013 +0100
+++ b/common/autoconf/toolchain.m4	Fri Sep 27 13:23:09 2013 +0100
@@ -1076,6 +1076,9 @@
     s390)
       ZERO_ARCHFLAG="-m31"
       ;;
+    aarch64)
+      ZERO_ARCHFLAG=""
+      ;;
     *)
       ZERO_ARCHFLAG="-m${OPENJDK_TARGET_CPU_BITS}"
   esac
--- CUT HERE ---

--- CUT HERE (jdk changeset) ---
exporting patch:
# HG changeset patch
# User Edward Nevill edward.nevill@linaro.org
# Date 1380284741 -3600
#      Fri Sep 27 13:25:41 2013 +0100
# Node ID eb4c2c3e5f7c19dcce8ae78f9d32092e7f2ca9ab
# Parent  272afbf274da0e7daa1b3c6cebcd7a211fe57499
Tweak build flags in line with jdk8-b90

diff -r 272afbf274da -r eb4c2c3e5f7c make/jdk_generic_profile.sh
--- a/make/jdk_generic_profile.sh	Fri Sep 27 11:15:51 2013 +0100
+++ b/make/jdk_generic_profile.sh	Fri Sep 27 13:25:41 2013 +0100
@@ -327,6 +327,9 @@
     s390)
       ZERO_ARCHFLAG="-m31"
       ;;
+    aarch64)
+      ZERO_ARCHFLAG=""
+      ;;
     *)
       ZERO_ARCHFLAG="-m${ARCH_DATA_MODEL}"
   esac
--- CUT HERE ---

--- CUT HERE (hotspot changeset) ---
exporting patch:
# HG changeset patch
# User Edward Nevill edward.nevill@linaro.org
# Date 1380284861 -3600
#      Fri Sep 27 13:27:41 2013 +0100
# Node ID 268348f09dae7e10e5c86ea708d4bcdff74accf2
# Parent  707ad5ec9049670ed22d89254795cc59d8564f07
Update aarch64 specific code to make it work with jdk8-b90

diff -r 707ad5ec9049 -r 268348f09dae src/cpu/aarch64/vm/aarch64.ad
--- a/src/cpu/aarch64/vm/aarch64.ad	Fri Sep 27 11:21:35 2013 +0100
+++ b/src/cpu/aarch64/vm/aarch64.ad	Fri Sep 27 13:27:41 2013 +0100
@@ -1443,50 +1443,6 @@
 
 //=============================================================================
 
-// size of call stub, compiled java to interpretor
-uint size_java_to_interp()
-{
-  // count a mov mem --> to 4 movz/k and a branch
-  return 6 * NativeInstruction::instruction_size;
-}
-
-// emit call stub, compiled java to interpreter
-void emit_java_to_interp(CodeBuffer& cbuf, address mark)
-{
-  // Stub is fixed up when the corresponding call is converted from
-  // calling compiled code to calling interpreted code.
-  // mov rmethod, zr
-  // here:
-  // b(here) # jump to self
-
-  // mark is set by caller when planting the br to be relocated
-
-  // Note that the code buffer's insts_mark is always relative to insts.
-  // That's why we must use the macroassembler to generate a stub.
-  MacroAssembler _masm(&cbuf);
-
-  address base = __ start_a_stub(Compile::MAX_stubs_size);
-
-  int offset = __ offset();
-  if (base == NULL)  return;  // CodeBuffer::expand failed
-  // static stub relocation stores the instruction address of the call
-  __ relocate(static_stub_Relocation::spec(mark));
-  // static stub relocation also tags the Method* in the code-stream.
-  __ mov_metadata(rmethod, (Metadata*)NULL);
-  __ b(__ pc());
-
-  assert((__ offset() - offset) <= (int)size_java_to_interp(), "stub too big");
-  __ end_a_stub();
-}
-
-// relocation entries for call stub, compiled java to interpretor
-uint reloc_java_to_interp()
-{
-  // TODO fixme
-  // return a large number
-  return 5;
-}
-
 uint size_exception_handler()
 {
   // count up to 4 movz/n/k instructions and one branch instruction
@@ -2825,7 +2781,7 @@
 
     if (_method) {
       // Emit stub for static call
-      emit_java_to_interp(cbuf, mark);
+      CompiledStaticCall::emit_to_interp_stub(cbuf, mark);
     }
   %}
 
@@ -2853,7 +2809,7 @@
 
     if (_method) {
       // Emit stub for static call
-      emit_java_to_interp(cbuf, mark);
+      CompiledStaticCall::emit_to_interp_stub(cbuf, mark);
     }
 
     // now restore sp
diff -r 707ad5ec9049 -r 268348f09dae src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp
--- a/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp	Fri Sep 27 11:21:35 2013 +0100
+++ b/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp	Fri Sep 27 13:27:41 2013 +0100
@@ -272,9 +272,6 @@
   return generate_oop_map(sasm, save_fpu_registers);
 }
 
-static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) { Unimplemented(); }
-
-
 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
   if (restore_fpu_registers) {
     for (int i = 0; i < 32; i += 2)
diff -r 707ad5ec9049 -r 268348f09dae src/cpu/aarch64/vm/compiledIC_aarch64.cpp
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/cpu/aarch64/vm/compiledIC_aarch64.cpp	Fri Sep 27 13:27:41 2013 +0100
@@ -0,0 +1,182 @@
+/*
+ * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ *
+ */
+
+#include "precompiled.hpp"
+#include "asm/macroAssembler.inline.hpp"
+#include "code/compiledIC.hpp"
+#include "code/icBuffer.hpp"
+#include "code/nmethod.hpp"
+#include "memory/resourceArea.hpp"
+#include "runtime/mutexLocker.hpp"
+#include "runtime/safepoint.hpp"
+
+// Release the CompiledICHolder* associated with this call site is there is one.
+void CompiledIC::cleanup_call_site(virtual_call_Relocation* call_site) {
+  // This call site might have become stale so inspect it carefully.
+  NativeCall* call = nativeCall_at(call_site->addr());
+  if (is_icholder_entry(call->destination())) {
+    NativeMovConstReg* value = nativeMovConstReg_at(call_site->cached_value());
+    InlineCacheBuffer::queue_for_release((CompiledICHolder*)value->data());
+  }
+}
+
+bool CompiledIC::is_icholder_call_site(virtual_call_Relocation* call_site) {
+  // This call site might have become stale so inspect it carefully.
+  NativeCall* call = nativeCall_at(call_site->addr());
+  return is_icholder_entry(call->destination());
+}
+
+//-----------------------------------------------------------------------------
+// High-level access to an inline cache. Guaranteed to be MT-safe.
+
+CompiledIC::CompiledIC(nmethod* nm, NativeCall* call)
+  : _ic_call(call)
+{
+  address ic_call = call->instruction_address();
+
+  assert(ic_call != NULL, "ic_call address must be set");
+  assert(nm != NULL, "must pass nmethod");
+  assert(nm->contains(ic_call), "must be in nmethod");
+
+  // Search for the ic_call at the given address.
+  RelocIterator iter(nm, ic_call, ic_call+1);
+  bool ret = iter.next();
+  assert(ret == true, "relocInfo must exist at this address");
+  assert(iter.addr() == ic_call, "must find ic_call");
+  if (iter.type() == relocInfo::virtual_call_type) {
+    virtual_call_Relocation* r = iter.virtual_call_reloc();
+    _is_optimized = false;
+    _value = nativeMovConstReg_at(r->cached_value());
+  } else {
+    assert(iter.type() == relocInfo::opt_virtual_call_type, "must be a virtual call");
+    _is_optimized = true;
+    _value = NULL;
+  }
+}
+
+// ----------------------------------------------------------------------------
+
+#define __ _masm.
+void CompiledStaticCall::emit_to_interp_stub(CodeBuffer &cbuf, address mark) {
+  // Stub is fixed up when the corresponding call is converted from
+  // calling compiled code to calling interpreted code.
+  // movq rbx, 0
+  // jmp -5 # to self
+
+  // address mark = cbuf.insts_mark();  // Get mark within main instrs section.
+
+  // Note that the code buffer's insts_mark is always relative to insts.
+  // That's why we must use the macroassembler to generate a stub.
+  MacroAssembler _masm(&cbuf);
+
+  address base = __ start_a_stub(to_interp_stub_size()*2);
+
+  int offset = __ offset();
+  if (base == NULL)  return;  // CodeBuffer::expand failed
+  // static stub relocation stores the instruction address of the call
+  __ relocate(static_stub_Relocation::spec(mark));
+  // static stub relocation also tags the Method* in the code-stream.
+  __ mov_metadata(rmethod, (Metadata*)NULL);
+  __ b(__ pc());
+
+  assert((__ offset() - offset) <= (int)to_interp_stub_size(), "stub too big");
+  __ end_a_stub();
+}
+#undef __
+
+int CompiledStaticCall::to_interp_stub_size() {
+  // count a mov mem --> to 4 movz/k and a branch
+  return 6 * NativeInstruction::instruction_size;
+}
+
+// Relocation entries for call stub, compiled java to interpreter.
+int CompiledStaticCall::reloc_to_interp_stub() {
+  // TODO fixme
+  // return a large number
+  return 5;
+}
+
+void CompiledStaticCall::set_to_interpreted(methodHandle callee, address entry) {
+  address stub = find_stub();
+  guarantee(stub != NULL, "stub not found");
+
+  if (TraceICs) {
+    ResourceMark rm;
+    tty->print_cr("CompiledStaticCall@" INTPTR_FORMAT ": set_to_interpreted %s",
+                  instruction_address(),
+                  callee->name_and_sig_as_C_string());
+  }
+
+  // Creation also verifies the object.
+  NativeMovConstReg* method_holder = nativeMovConstReg_at(stub);
+  NativeJump*        jump          = nativeJump_at(method_holder->next_instruction_address());
+
+  assert(method_holder->data() == 0 || method_holder->data() == (intptr_t)callee(),
+         "a) MT-unsafe modification of inline cache");
+  assert(jump->jump_destination() == (address)-1 || jump->jump_destination() == entry,
+         "b) MT-unsafe modification of inline cache");
+
+  // Update stub.
+  method_holder->set_data((intptr_t)callee());
+  jump->set_jump_destination(entry);
+
+  // Update jump to call.
+  set_destination_mt_safe(stub);
+}
+
+void CompiledStaticCall::set_stub_to_clean(static_stub_Relocation* static_stub) {
+  assert (CompiledIC_lock->is_locked() || SafepointSynchronize::is_at_safepoint(), "mt unsafe call");
+  // Reset stub.
+  address stub = static_stub->addr();
+  assert(stub != NULL, "stub not found");
+  // Creation also verifies the object.
+  NativeMovConstReg* method_holder = nativeMovConstReg_at(stub);
+  NativeJump*        jump          = nativeJump_at(method_holder->next_instruction_address());
+  method_holder->set_data(0);
+  jump->set_jump_destination((address)-1);
+}
+
+//-----------------------------------------------------------------------------
+// Non-product mode code
+#ifndef PRODUCT
+
+void CompiledStaticCall::verify() {
+  // Verify call.
+  NativeCall::verify();
+  if (os::is_MP()) {
+    verify_alignment();
+  }
+
+  // Verify stub.
+  address stub = find_stub();
+  assert(stub != NULL, "no stub found for static call");
+  // Creation also verifies the object.
+  NativeMovConstReg* method_holder = nativeMovConstReg_at(stub);
+  NativeJump*        jump          = nativeJump_at(method_holder->next_instruction_address());
+
+  // Verify state.
+  assert(is_clean() || is_call_to_compiled() || is_call_to_interpreted(), "sanity check");
+}
+
+#endif // !PRODUCT
diff -r 707ad5ec9049 -r 268348f09dae src/cpu/aarch64/vm/globalDefinitions_aarch64.hpp
--- a/src/cpu/aarch64/vm/globalDefinitions_aarch64.hpp	Fri Sep 27 11:21:35 2013 +0100
+++ b/src/cpu/aarch64/vm/globalDefinitions_aarch64.hpp	Fri Sep 27 13:27:41 2013 +0100
@@ -29,4 +29,6 @@
 
 const int StackAlignmentInBytes  = 16;
 
+#define SUPPORTS_NATIVE_CX8
+
 #endif // CPU_AARCH64_VM_GLOBALDEFINITIONS_AARCH64_HPP
diff -r 707ad5ec9049 -r 268348f09dae src/cpu/aarch64/vm/interp_masm_aarch64.cpp
--- a/src/cpu/aarch64/vm/interp_masm_aarch64.cpp	Fri Sep 27 11:21:35 2013 +0100
+++ b/src/cpu/aarch64/vm/interp_masm_aarch64.cpp	Fri Sep 27 13:27:41 2013 +0100
@@ -181,6 +181,23 @@
                                                                int bcp_offset,
                                                                size_t index_size) { Unimplemented(); }
 
+void method_counter_break(void)
+{
+}
+
+void InterpreterMacroAssembler::get_method_counters(Register method,
+                                                    Register mcs, Label& skip) {
+  Label has_counters;
+  call_VM(noreg, CAST_FROM_FN_PTR(address, method_counter_break));
+  ldr(mcs, Address(method, Method::method_counters_offset()));
+  cbnz(mcs, has_counters);
+  call_VM(noreg, CAST_FROM_FN_PTR(address,
+          InterpreterRuntime::build_method_counters), method);
+  ldr(mcs, Address(method, Method::method_counters_offset()));
+  cbz(mcs, skip); // No MethodCounters allocated, OutOfMemory
+  bind(has_counters);
+}
+
 // Load object from cpool->resolved_references(index)
 void InterpreterMacroAssembler::load_resolved_reference_at_index(
                                            Register result, Register index) {
diff -r 707ad5ec9049 -r 268348f09dae src/cpu/aarch64/vm/interp_masm_aarch64.hpp
--- a/src/cpu/aarch64/vm/interp_masm_aarch64.hpp	Fri Sep 27 11:21:35 2013 +0100
+++ b/src/cpu/aarch64/vm/interp_masm_aarch64.hpp	Fri Sep 27 13:27:41 2013 +0100
@@ -123,6 +123,7 @@
   void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2));
   void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2));
   void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2));
+  void get_method_counters(Register method, Register mcs, Label& skip);
 
   // load cpool->resolved_references(index);
   void load_resolved_reference_at_index(Register result, Register index);
diff -r 707ad5ec9049 -r 268348f09dae src/cpu/aarch64/vm/jni_aarch64.h
--- a/src/cpu/aarch64/vm/jni_aarch64.h	Fri Sep 27 11:21:35 2013 +0100
+++ b/src/cpu/aarch64/vm/jni_aarch64.h	Fri Sep 27 13:27:41 2013 +0100
@@ -1,7 +1,5 @@
 /*
- * Copyright (c) 2013, Red Hat Inc.
- * Copyright (c) 1997, 2011, Oracle and/or its affiliates.
- * All rights reserved.
+ * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,9 +26,15 @@
 #ifndef _JAVASOFT_JNI_MD_H_
 #define _JAVASOFT_JNI_MD_H_
 
-#if defined(LINUX)
+#if defined(SOLARIS) || defined(LINUX) || defined(_ALLBSD_SOURCE)
 
-#if defined(__GNUC__) && (__GNUC__ > 4) || (__GNUC__ == 4) && (__GNUC_MINOR__ > 2)
+
+// Note: please do not change these without also changing jni_md.h in the JDK
+// repository
+#ifndef __has_attribute
+  #define __has_attribute(x) 0
+#endif
+#if (defined(__GNUC__) && ((__GNUC__ > 4) || (__GNUC__ == 4) && (__GNUC_MINOR__ > 2))) || __has_attribute(visibility)
   #define JNIEXPORT     __attribute__((visibility("default")))
   #define JNIIMPORT     __attribute__((visibility("default")))
 #else
@@ -40,17 +44,19 @@
 
   #define JNICALL
   typedef int jint;
-#if defined(_LP64) && !defined(__APPLE__)
+#if defined(_LP64)
   typedef long jlong;
 #else
-  /*
-   * On _LP64 __APPLE__ "long" and "long long" are both 64 bits,
-   * but we use the "long long" typedef to avoid complaints from
-   * the __APPLE__ compiler about fprintf formats.
-   */
   typedef long long jlong;
 #endif
 
+#else
+  #define JNIEXPORT __declspec(dllexport)
+  #define JNIIMPORT __declspec(dllimport)
+  #define JNICALL __stdcall
+
+  typedef int jint;
+  typedef __int64 jlong;
 #endif
 
 typedef signed char jbyte;
diff -r 707ad5ec9049 -r 268348f09dae src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp
--- a/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp	Fri Sep 27 11:21:35 2013 +0100
+++ b/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp	Fri Sep 27 13:27:41 2013 +0100
@@ -624,6 +624,7 @@
   __ br(rscratch1);
 }
 
+#ifdef BUILTIN_SIM
 static void generate_i2c_adapter_name(char *result, int total_args_passed, const BasicType *sig_bt)
 {
   strcpy(result, "i2c(");
@@ -686,6 +687,7 @@
   result[idx++] = ')';
   result[idx] = '\0';
 }
+#endif
 
 // ---------------------------------------------------------------
 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
@@ -893,9 +895,6 @@
   }
 }
 
-
-static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { Unimplemented(); }
-
 // An oop arg. Must pass a handle not the oop itself
 static void object_move(MacroAssembler* masm,
                         OopMap* map,
diff -r 707ad5ec9049 -r 268348f09dae src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp
--- a/src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp	Fri Sep 27 11:21:35 2013 +0100
+++ b/src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp	Fri Sep 27 13:27:41 2013 +0100
@@ -339,19 +339,17 @@
 //       so we have a 'sticky' overflow test
 //
 // rmethod: method
-// r19: invocation counter
 //
 void InterpreterGenerator::generate_counter_incr(
         Label* overflow,
         Label* profile_method,
         Label* profile_method_continue) {
-  const Address invocation_counter(rmethod, in_bytes(Method::invocation_counter_offset()) +
-				            in_bytes(InvocationCounter::counter_offset()));
+  Label done;
   // Note: In tiered we increment either counters in Method* or in MDO depending if we're profiling or not.
   if (TieredCompilation) {
     int increment = InvocationCounter::count_increment;
     int mask = ((1 << Tier0InvokeNotifyFreqLog)  - 1) << InvocationCounter::count_shift;
-    Label no_mdo, done;
+    Label no_mdo;
     if (ProfileInterpreter) {
       // Are we profiling?
       __ ldr(r0, Address(rmethod, Method::method_data_offset()));
@@ -363,29 +361,37 @@
       __ b(done);
     }
     __ bind(no_mdo);
-    // Increment counter in Method* (we don't need to load it, it's in ecx).
-    __ increment_mask_and_jump(invocation_counter, increment, mask, rscratch1, true, Assembler::EQ, overflow);
+    // Increment counter in MethodCounters
+    const Address invocation_counter(rscratch2,
+                  MethodCounters::invocation_counter_offset() +
+                  InvocationCounter::counter_offset());
+    __ get_method_counters(rmethod, rscratch2, done);
+    __ increment_mask_and_jump(invocation_counter, increment, mask, rscratch1, false, Assembler::EQ, overflow);
     __ bind(done);
   } else {
-    const Address backedge_counter(rmethod,
-                                   Method::backedge_counter_offset() +
-                                   InvocationCounter::counter_offset());
+    const Address backedge_counter(rscratch2,
+                  MethodCounters::backedge_counter_offset() +
+                  InvocationCounter::counter_offset());
+    const Address invocation_counter(rscratch2,
+                  MethodCounters::invocation_counter_offset() +
+                  InvocationCounter::counter_offset());
+
+    __ get_method_counters(rmethod, rscratch2, done);
 
     if (ProfileInterpreter) { // %%% Merge this into MethodData*
-      const Address invocation_counter
-	= Address(rmethod, Method::interpreter_invocation_counter_offset());
-      __ ldrw(r1, invocation_counter);
+      __ ldrw(r1, Address(rscratch2, MethodCounters::interpreter_invocation_counter_offset()));
       __ addw(r1, r1, 1);
-      __ strw(r1, invocation_counter);
+      __ strw(r1, Address(rscratch2, MethodCounters::interpreter_invocation_counter_offset()));
     }
     // Update standard invocation counters
-    __ ldrw(r0, backedge_counter);   // load backedge counter
+    __ ldrw(r1, invocation_counter);
+    __ ldrw(r0, backedge_counter);
 
-    __ addw(r19, r19, InvocationCounter::count_increment);
-    __ andw(r0, r0, InvocationCounter::count_mask_value); // mask out the status bits
+    __ addw(r1, r1, InvocationCounter::count_increment);
+    __ andw(r0, r0, InvocationCounter::count_mask_value);
 
-    __ strw(r19, invocation_counter); // save invocation count
-    __ addw(r0, r0, r19);                // add both counters
+    __ strw(r1, invocation_counter);
+    __ addw(r0, r0, r1);                // add both counters
 
     // profile_method is non-null only for interpreted method so
     // profile_method != NULL == !native_call
@@ -412,6 +418,7 @@
       __ cmpw(r0, rscratch2);
       __ br(Assembler::HS, *overflow);
     }
+    __ bind(done);
   }
 }
 
@@ -421,10 +428,6 @@
   // On return (i.e. jump to entry_point) [ back to invocation of interpreter ]
   // Everything as it was on entry
 
-  const Address invocation_counter(rmethod,
-                                   Method::invocation_counter_offset() +
-                                   InvocationCounter::counter_offset());
-
   // InterpreterRuntime::frequency_counter_overflow takes two
   // arguments, the first (thread) is passed by call_VM, the second
   // indicates if the counter overflow occurs at a backwards branch
@@ -711,9 +714,6 @@
   address entry_point = __ pc();
 
   const Address constMethod       (rmethod, Method::const_offset());
-  const Address invocation_counter(rmethod, Method::
-                                        invocation_counter_offset() +
-                                        InvocationCounter::counter_offset());
   const Address access_flags      (rmethod, Method::access_flags_offset());
   const Address size_of_parameters(r2, ConstMethod::
 				       size_of_parameters_offset());
@@ -740,10 +740,6 @@
   __ mov(rscratch1, sp);
   __ andr(sp, esp, -16);
 
-  if (inc_counter) {
-    __ ldrw(r19, invocation_counter);  // (pre-)fetch invocation count
-  }
-
   // initialize fixed part of activation frame
   generate_fixed_frame(true, rscratch1);
 #ifndef PRODUCT
@@ -1158,9 +1154,6 @@
   address entry_point = __ pc();
 
   const Address constMethod(rmethod, Method::const_offset());
-  const Address invocation_counter(rmethod,
-                                   Method::invocation_counter_offset() +
-                                   InvocationCounter::counter_offset());
   const Address access_flags(rmethod, Method::access_flags_offset());
   const Address size_of_parameters(r3,
                                    ConstMethod::size_of_parameters_offset());
@@ -1204,11 +1197,6 @@
     __ bind(exit);
   }
 
-  // (pre-)fetch invocation count
-  if (inc_counter) {
-    __ ldrw(r19, invocation_counter);
-  }
-
   // And the base dispatch table
   __ get_dispatch();
 
diff -r 707ad5ec9049 -r 268348f09dae src/cpu/aarch64/vm/templateTable_aarch64.cpp
--- a/src/cpu/aarch64/vm/templateTable_aarch64.cpp	Fri Sep 27 11:21:35 2013 +0100
+++ b/src/cpu/aarch64/vm/templateTable_aarch64.cpp	Fri Sep 27 13:27:41 2013 +0100
@@ -170,9 +170,15 @@
         if (val == noreg) {
           __ store_heap_oop_null(Address(r3, 0));
         } else {
+          // G1 barrier needs uncompressed oop for region cross check.
+          Register new_val = val;
+          if (UseCompressedOops) {
+            new_val = rscratch1;
+            __ mov(new_val, val);
+          }
           __ store_heap_oop(Address(r3, 0), val);
           __ g1_write_barrier_post(r3 /* store_adr */,
-                                   val /* new_val */,
+                                   new_val /* new_val */,
                                    rthread /* thread */,
                                    r10 /* tmp */,
                                    r1 /* tmp2 */);
@@ -1555,11 +1561,10 @@
 void TemplateTable::branch(bool is_jsr, bool is_wide)
 {
   __ profile_taken_branch(r0, r1);
-  const ByteSize be_offset = Method::backedge_counter_offset() +
+  const ByteSize be_offset = MethodCounters::backedge_counter_offset() +
                              InvocationCounter::counter_offset();
-  const ByteSize inv_offset = Method::invocation_counter_offset() +
+  const ByteSize inv_offset = MethodCounters::invocation_counter_offset() +
                               InvocationCounter::counter_offset();
-  const int method_offset = frame::interpreter_frame_method_offset * wordSize;
 
   // load branch displacement
   if (!is_wide) {
@@ -1610,6 +1615,24 @@
     // r2: target offset
     __ cmp(r2, zr);
     __ br(Assembler::GT, dispatch); // count only if backward branch
+
+    // ECN: FIXME: This code smells
+    // check if MethodCounters exists
+    Label has_counters;
+    __ ldr(rscratch1, Address(rmethod, Method::method_counters_offset()));
+    __ cbnz(rscratch1, has_counters);
+    __ push(r0);
+    __ push(r1);
+    __ push(r2);
+    __ call_VM(noreg, CAST_FROM_FN_PTR(address,
+	    InterpreterRuntime::build_method_counters), rmethod);
+    __ pop(r2);
+    __ pop(r1);
+    __ pop(r0);
+    __ ldr(rscratch1, Address(rmethod, Method::method_counters_offset()));
+    __ cbz(rscratch1, dispatch); // No MethodCounters allocated, OutOfMemory
+    __ bind(has_counters);
+
     if (TieredCompilation) {
       Label no_mdo;
       int increment = InvocationCounter::count_increment;
@@ -1626,16 +1649,18 @@
         __ b(dispatch);
       }
       __ bind(no_mdo);
-      // Increment backedge counter in Method*
-      __ increment_mask_and_jump(Address(rmethod, be_offset), increment, mask,
+      // Increment backedge counter in MethodCounters*
+      __ ldr(rscratch1, Address(rmethod, Method::method_counters_offset()));
+      __ increment_mask_and_jump(Address(rscratch1, be_offset), increment, mask,
                                  r0, false, Assembler::EQ, &backedge_counter_overflow);
     } else {
       // increment counter
-      __ ldrw(r0, Address(rmethod, be_offset));        // load backedge counter
+      __ ldr(rscratch2, Address(rmethod, Method::method_counters_offset()));
+      __ ldrw(r0, Address(rscratch2, be_offset));        // load backedge counter
       __ addw(rscratch1, r0, InvocationCounter::count_increment); // increment counter
-      __ strw(rscratch1, Address(rmethod, be_offset));        // store counter
-
-      __ ldrw(r0, Address(rmethod, inv_offset));    // load invocation counter
+      __ strw(rscratch1, Address(rscratch2, be_offset));        // store counter
+
+      __ ldrw(r0, Address(rscratch2, inv_offset));    // load invocation counter
       __ andw(r0, r0, (unsigned)InvocationCounter::count_mask_value); // and the status bits
       __ addw(r0, r0, rscratch1);        // add both counters
 
diff -r 707ad5ec9049 -r 268348f09dae src/os_cpu/linux_aarch64/vm/os_linux_aarch64.cpp
--- a/src/os_cpu/linux_aarch64/vm/os_linux_aarch64.cpp	Fri Sep 27 11:21:35 2013 +0100
+++ b/src/os_cpu/linux_aarch64/vm/os_linux_aarch64.cpp	Fri Sep 27 13:27:41 2013 +0100
@@ -534,7 +534,7 @@
      // JVM needs to know exact stack location, abort if it fails
      if (rslt != 0) {
        if (rslt == ENOMEM) {
-         vm_exit_out_of_memory(0, "pthread_getattr_np");
+         vm_exit_out_of_memory(0, OOM_MMAP_ERROR, "pthread_getattr_np");
        } else {
          fatal(err_msg("pthread_getattr_np failed with errno = %d", rslt));
        }
diff -r 707ad5ec9049 -r 268348f09dae src/share/vm/code/compiledIC.hpp
--- a/src/share/vm/code/compiledIC.hpp	Fri Sep 27 11:21:35 2013 +0100
+++ b/src/share/vm/code/compiledIC.hpp	Fri Sep 27 13:27:41 2013 +0100
@@ -308,7 +308,11 @@
   friend CompiledStaticCall* compiledStaticCall_at(Relocation* call_site);
 
   // Code
+#if defined AARCH64 && !defined ZERO
+  static void emit_to_interp_stub(CodeBuffer &cbuf, address mark);
+#else
   static void emit_to_interp_stub(CodeBuffer &cbuf);
+#endif
   static int to_interp_stub_size();
   static int reloc_to_interp_stub();
 
diff -r 707ad5ec9049 -r 268348f09dae src/share/vm/runtime/stubRoutines.cpp
--- a/src/share/vm/runtime/stubRoutines.cpp	Fri Sep 27 11:21:35 2013 +0100
+++ b/src/share/vm/runtime/stubRoutines.cpp	Fri Sep 27 13:27:41 2013 +0100
@@ -155,7 +155,7 @@
 }
 
 
-#ifdef ASSERT
+#ifdef ASSERTdisabled
 typedef void (*arraycopy_fn)(address src, address dst, int count);
 
 // simple tests of generated arraycopy functions
--- CUT HERE ---

--- CUT HERE (2nd jdk8 changeset) ---
exporting patch:
# HG changeset patch
# User Edward Nevill edward.nevill@linaro.org
# Date 1380289100 -3600
#      Fri Sep 27 14:38:20 2013 +0100
# Node ID efab09a45ff34b786b5bfa7a2792237f272954c4
# Parent  d9e6ebc7ed59b3209c2a9f07b4a0a79ecc59cb7a
Additional patch to fix merge mangling to generated-configure.sh

diff -r d9e6ebc7ed59 -r efab09a45ff3 common/autoconf/generated-configure.sh
--- a/common/autoconf/generated-configure.sh	Fri Sep 27 13:23:09 2013 +0100
+++ b/common/autoconf/generated-configure.sh	Fri Sep 27 14:38:20 2013 +0100
@@ -7132,9 +7132,6 @@
     fi
 
 
-      aarch64)
-        ZERO_ARCHFLAG=""
-        ;;
     # ZERO_ARCHDEF is used to enable architecture-specific code
     case "${OPENJDK_TARGET_CPU}" in
       ppc*)    ZERO_ARCHDEF=PPC   ;;
--- CUT HERE ---
