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[89.143.138.142]) by mx.google.com with ESMTPSA id fh5sm3972994wib.5.2014.08.27.08.13.23 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 27 Aug 2014 08:13:26 -0700 (PDT) From: Ard Biesheuvel To: lersek@redhat.com, olivier.martin@arm.com, edk2-devel@lists.sourceforge.net, peter.maydell@linaro.org, christoffer.dall@linaro.org, drjones@redhat.com, ilias.biris@linaro.org, leif.lindholm@linaro.org Date: Wed, 27 Aug 2014 17:12:50 +0200 Message-Id: <1409152378-19706-3-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1409152378-19706-1-git-send-email-ard.biesheuvel@linaro.org> References: <1409152378-19706-1-git-send-email-ard.biesheuvel@linaro.org> X-Spam-Score: -1.5 (-) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain -0.0 SPF_PASS SPF: sender matches SPF record X-Headers-End: 1XMeuk-0004hV-Gh Subject: [edk2] [PATCH v3 02/10] ArmPkg: allow dynamically discovered virtual timer interrupt X-BeenThere: edk2-devel@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list Reply-To: edk2-devel@lists.sourceforge.net List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.sourceforge.net X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.160.170 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 To support booting on virtual machines whose interrupt routing is discovered from the device tree, allow the interrupt numbers to be redeclared as PcdsDynamic by the platform .dsc Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- ArmPkg/ArmPkg.dec | 2 ++ ArmPkg/Drivers/TimerDxe/TimerDxe.c | 6 +++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec index c2551d7c3307..0392af52758f 100644 --- a/ArmPkg/ArmPkg.dec +++ b/ArmPkg/ArmPkg.dec @@ -140,6 +140,8 @@ # Maximum file size for TFTP servers that do not support 'tsize' extension gArmTokenSpaceGuid.PcdMaxTftpFileSize|0x01000000|UINT32|0x00000000 + +[PcdsFixedAtBuild.common,PcdsDynamic.common] # # ARM Architectural Timer # diff --git a/ArmPkg/Drivers/TimerDxe/TimerDxe.c b/ArmPkg/Drivers/TimerDxe/TimerDxe.c index 9227be8326b0..2787f05c62be 100644 --- a/ArmPkg/Drivers/TimerDxe/TimerDxe.c +++ b/ArmPkg/Drivers/TimerDxe/TimerDxe.c @@ -36,6 +36,8 @@ EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL; // The current period of the timer interrupt UINT64 mTimerPeriod = 0; +UINTN mArmArchTimerTimerFreq = 0; + // Cached copy of the Hardware Interrupt protocol instance EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL; @@ -144,7 +146,7 @@ TimerDriverSetTimerPeriod ( // Convert TimerPeriod to micro sec units TimerTicks = DivU64x32 (TimerPeriod, 10); - TimerTicks = MultU64x32 (TimerTicks, (PcdGet32(PcdArmArchTimerFreqInHz)/1000000)); + TimerTicks = MultU64x32 (TimerTicks, mArmArchTimerTimerFreq); ArmArchTimerSetTimerVal((UINTN)TimerTicks); @@ -343,6 +345,8 @@ TimerInitialize ( Status = TimerDriverSetTimerPeriod (&gTimer, 0); ASSERT_EFI_ERROR (Status); + mArmArchTimerTimerFreq = ArmArchTimerGetTimerFreq () / 1000000; + // Install secure and Non-secure interrupt handlers // Note: Because it is not possible to determine the security state of the // CPU dynamically, we just install interrupt handler for both sec and non-sec