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[50.57.142.19]) by mx.google.com with ESMTPS id gq6si2644029qcb.14.2014.10.01.13.03.48 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 01 Oct 2014 13:03:48 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XZQ78-00031S-KK; Wed, 01 Oct 2014 20:03:06 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XZQ77-000319-8a for xen-devel@lists.xen.org; Wed, 01 Oct 2014 20:03:05 +0000 Received: from [85.158.143.35:45558] by server-3.bemta-4.messagelabs.com id EB/8D-06192-8FD5C245; Wed, 01 Oct 2014 20:03:04 +0000 X-Env-Sender: Suravee.Suthikulpanit@amd.com X-Msg-Ref: server-7.tower-21.messagelabs.com!1412193782!13262934!1 X-Originating-IP: [65.55.169.108] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 6.12.2; banners=-,-,- X-VirusChecked: Checked Received: (qmail 15314 invoked from network); 1 Oct 2014 20:03:03 -0000 Received: from mail-bl2on0108.outbound.protection.outlook.com (HELO na01-bl2-obe.outbound.protection.outlook.com) (65.55.169.108) by server-7.tower-21.messagelabs.com with AES256-SHA encrypted SMTP; 1 Oct 2014 20:03:03 -0000 Received: from BY2PR02CA003.namprd02.prod.outlook.com (10.255.247.23) by BY2PR02MB201.namprd02.prod.outlook.com (10.242.232.12) with Microsoft SMTP Server (TLS) id 15.0.1039.15; Wed, 1 Oct 2014 20:03:00 +0000 Received: from BY2FFO11FD022.protection.gbl (2a01:111:f400:7c0c::165) by BY2PR02CA003.outlook.office365.com (2a01:111:e400:2c16::23) with Microsoft SMTP Server (TLS) id 15.0.1044.10 via Frontend Transport; Wed, 1 Oct 2014 20:03:00 +0000 Received: from atltwp01.amd.com (165.204.84.221) by BY2FFO11FD022.mail.protection.outlook.com (10.1.15.211) with Microsoft SMTP Server id 15.0.1029.15 via Frontend Transport; Wed, 1 Oct 2014 20:02:59 +0000 X-WSS-ID: 0NCS7OV-07-TWW-02 X-M-MSG: Received: from satlvexedge02.amd.com (satlvexedge02.amd.com [10.177.96.29]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by atltwp01.amd.com (Axway MailGate 5.3.1) with ESMTPS id 259C2CAE610; Wed, 1 Oct 2014 15:02:55 -0500 (CDT) Received: from SATLEXDAG03.amd.com (10.181.40.7) by SATLVEXEDGE02.amd.com (10.177.96.29) with Microsoft SMTP Server (TLS) id 14.3.195.1; Wed, 1 Oct 2014 15:03:21 -0500 Received: from ssuthiku-fedora-lt.amd.com (10.180.168.240) by satlexdag03.amd.com (10.181.40.7) with Microsoft SMTP Server id 14.3.195.1; Wed, 1 Oct 2014 16:02:57 -0400 From: To: , , Date: Wed, 1 Oct 2014 15:02:52 -0500 Message-ID: <1412193773-31042-2-git-send-email-suravee.suthikulpanit@amd.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1412193773-31042-1-git-send-email-suravee.suthikulpanit@amd.com> References: <1412193773-31042-1-git-send-email-suravee.suthikulpanit@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:165.204.84.221; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(428002)(199003)(189002)(76482002)(89996001)(84676001)(101416001)(85306004)(107046002)(4396001)(50226001)(104166001)(76176999)(229853001)(77156001)(48376002)(95666004)(97736003)(87936001)(21056001)(50466002)(50986999)(99396003)(19580395003)(19580405001)(64706001)(33646002)(31966008)(105586002)(77096002)(88136002)(62966002)(80022003)(87286001)(68736004)(86362001)(46102003)(93916002)(85852003)(36756003)(120916001)(47776003)(102836001)(106466001)(20776003)(92566001)(53416004)(86152002)(2201001)(92726001)(10300001)(44976005); DIR:OUT; SFP:1102; SCL:1; SRVR:BY2PR02MB201; H:atltwp01.amd.com; FPR:; MLV:sfv; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BY2PR02MB201; X-Forefront-PRVS: 0351D213B3 Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) X-OriginatorOrg: amd4.onmicrosoft.com Cc: Suravee Suthikulpanit , xen-devel@lists.xen.org Subject: [Xen-devel] [PATCH 1/2] xen/arm: Initial support for PSCI-0.2 X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: suravee.suthikulpanit@amd.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.48 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: From: Suravee Suthikulpanit This patch adds support for PSCI-0.2 PSCI_VERSION, CPU_ON, SYSTEM_OFF, and SYSTEM_RESET functions. For PSCI-0.2, the new DT binding "arm,psci-0.2" is used for matching. The psci_init() is now refactored to handle both PSCI-0.1 and PSCI-0.2. Also, to add support for PSCI_VERSION, this patch replaces the "bool_t psci_available" variable with "int psci_ver", which contains the PSCI_VERSION as described in the PSCI-0.2 spec. For v0.1, this psci_ver is 1. Signed-off-by: Suravee Suthikulpanit Acked-by: Stefano Stabellini --- xen/arch/arm/arm64/smpboot.c | 2 +- xen/arch/arm/platform.c | 2 +- xen/arch/arm/psci.c | 72 +++++++++++++++++++++++++++++++++++++++----- xen/include/asm-arm/psci.h | 4 ++- 4 files changed, 69 insertions(+), 11 deletions(-) diff --git a/xen/arch/arm/arm64/smpboot.c b/xen/arch/arm/arm64/smpboot.c index 9146476..341cc77 100644 --- a/xen/arch/arm/arm64/smpboot.c +++ b/xen/arch/arm/arm64/smpboot.c @@ -54,7 +54,7 @@ static void __init smp_spin_table_init(int cpu, struct dt_device_node *dn) static int __init smp_psci_init(int cpu) { - if ( !psci_available ) + if ( !psci_ver ) { printk("CPU%d asks for PSCI, but DTB has no PSCI node\n", cpu); return -ENODEV; diff --git a/xen/arch/arm/platform.c b/xen/arch/arm/platform.c index 74c3328..cb4cda8 100644 --- a/xen/arch/arm/platform.c +++ b/xen/arch/arm/platform.c @@ -110,7 +110,7 @@ int __init platform_specific_mapping(struct domain *d) #ifdef CONFIG_ARM_32 int __init platform_cpu_up(int cpu) { - if ( psci_available ) + if ( psci_ver ) return call_psci_cpu_on(cpu); if ( platform && platform->cpu_up ) diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index b6360d5..874917e 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -23,7 +23,7 @@ #include #include -bool_t psci_available; +int psci_ver; #ifdef CONFIG_ARM_32 #define REG_PREFIX "r" @@ -58,16 +58,23 @@ int call_psci_cpu_on(int cpu) cpu_logical_map(cpu), __pa(init_secondary), 0); } -int __init psci_init(void) +void call_psci_system_off(void) +{ + if ( psci_ver > 2 ) + __invoke_psci_fn_smc(PSCI_0_2_FN_SYSTEM_OFF, 0, 0, 0); +} + +void call_psci_system_reset(void) +{ + if ( psci_ver > 2 ) + __invoke_psci_fn_smc(PSCI_0_2_FN_SYSTEM_RESET, 0, 0, 0); +} + +int __init psci_is_smc_method(const struct dt_device_node *psci) { - const struct dt_device_node *psci; int ret; const char *prop_str; - psci = dt_find_compatible_node(NULL, NULL, "arm,psci"); - if ( !psci ) - return -ENODEV; - ret = dt_property_read_string(psci, "method", &prop_str); if ( ret ) { @@ -85,19 +92,68 @@ int __init psci_init(void) return -EINVAL; } + return 0; +} + +int __init psci_init_0_1(const struct dt_device_node *psci) +{ + int ret; + + ret = psci_is_smc_method(psci); + if ( ret ) + return -EINVAL; + if ( !dt_property_read_u32(psci, "cpu_on", &psci_cpu_on_nr) ) { printk("/psci node is missing the \"cpu_on\" property\n"); return -ENOENT; } - psci_available = 1; + psci_ver = 1; printk(XENLOG_INFO "Using PSCI for SMP bringup\n"); return 0; } +int __init psci_init_0_2(const struct dt_device_node *psci) +{ + int ret; + + ret = psci_is_smc_method(psci); + if ( ret ) + return -EINVAL; + + psci_ver = __invoke_psci_fn_smc(PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0); + + if ( psci_ver != 2 ) + { + printk("Error: The retrieved PSCI version (%#x) does not support.\n", psci_ver); + return -EOPNOTSUPP; + } + + psci_cpu_on_nr = PSCI_0_2_FN_CPU_ON; + + printk(XENLOG_INFO "Using PSCI-0.2 for SMP bringup\n"); + + return 0; +} + +int __init psci_init(void) +{ + const struct dt_device_node *psci; + + psci = dt_find_compatible_node(NULL, NULL, "arm,psci"); + if ( psci ) + return psci_init_0_1(psci); + + psci = dt_find_compatible_node(NULL, NULL, "arm,psci-0.2"); + if ( psci ) + return psci_init_0_2(psci); + + return -ENODEV; +} + /* * Local variables: * mode: C diff --git a/xen/include/asm-arm/psci.h b/xen/include/asm-arm/psci.h index 9777c03..ab37984 100644 --- a/xen/include/asm-arm/psci.h +++ b/xen/include/asm-arm/psci.h @@ -13,10 +13,12 @@ #define PSCI_DISABLED -8 /* availability of PSCI on the host for SMP bringup */ -extern bool_t psci_available; +extern int psci_ver; int psci_init(void); int call_psci_cpu_on(int cpu); +void call_psci_system_off(void); +void call_psci_system_reset(void); /* functions to handle guest PSCI requests */ int32_t do_psci_cpu_on(uint32_t vcpuid, register_t entry_point);