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[50.57.142.19]) by mx.google.com with ESMTPS id ez9si8689398vdb.40.2015.05.17.13.05.50 (version=TLSv1 cipher=RC4-SHA bits=128/128); Sun, 17 May 2015 13:05:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xen.org designates 50.57.142.19 as permitted sender) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Yu4oC-0001fe-5T; Sun, 17 May 2015 20:05:12 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Yu4o9-0001dl-UM for xen-devel@lists.xen.org; Sun, 17 May 2015 20:05:10 +0000 Received: from [193.109.254.147] by server-10.bemta-14.messagelabs.com id 7A/D5-02785-474F8555; Sun, 17 May 2015 20:05:08 +0000 X-Env-Sender: parth.dixit@linaro.org X-Msg-Ref: server-3.tower-27.messagelabs.com!1431893106!18165123!1 X-Originating-IP: [209.85.192.170] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 6.13.15; banners=-,-,- X-VirusChecked: Checked Received: (qmail 21003 invoked from network); 17 May 2015 20:05:07 -0000 Received: from mail-pd0-f170.google.com (HELO mail-pd0-f170.google.com) (209.85.192.170) by server-3.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 17 May 2015 20:05:07 -0000 Received: by pdea3 with SMTP id a3so116245980pde.2 for ; Sun, 17 May 2015 13:05:06 -0700 (PDT) X-Received: by 10.66.224.109 with SMTP id rb13mr37100795pac.133.1431893106014; Sun, 17 May 2015 13:05:06 -0700 (PDT) Received: from localhost.localdomain ([117.247.24.139]) by mx.google.com with ESMTPSA id j9sm7838401pdm.53.2015.05.17.13.05.02 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 17 May 2015 13:05:05 -0700 (PDT) From: Parth Dixit To: xen-devel@lists.xen.org Date: Mon, 18 May 2015 01:33:38 +0530 Message-Id: <1431893048-5214-12-git-send-email-parth.dixit@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1431893048-5214-1-git-send-email-parth.dixit@linaro.org> References: <1431893048-5214-1-git-send-email-parth.dixit@linaro.org> Cc: keir@xen.org, ian.campbell@citrix.com, andrew.cooper3@citrix.com, tim@xen.org, julien.grall@citrix.com, stefano.stabellini@citrix.com, jbeulich@suse.com, parth.dixit@linaro.org, christoffer.dall@linaro.org Subject: [Xen-devel] [PATCH v2 11/41] arm/acpi : add GTDT support updated by ACPI 5.1 X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: parth.dixit@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.45 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: With ACPI 5.0, we got per-processor timer support in GTDT, and ACPI 5.1 introduced the support for platform (memory-mapped) timers: GT Block and SBSA watchdog timer, add the code needed for the spec change. Signed-off-by: Hanjun Guo Signed-off-by: Naresh Bhat Signed-off-by: Parth Dixit --- xen/include/acpi/actbl3.h | 92 +++++++++++++++++++++++++++++++++++++++------- xen/include/asm-arm/acpi.h | 2 + 2 files changed, 80 insertions(+), 14 deletions(-) diff --git a/xen/include/acpi/actbl3.h b/xen/include/acpi/actbl3.h index 8c61b5f..7664f9d 100644 --- a/xen/include/acpi/actbl3.h +++ b/xen/include/acpi/actbl3.h @@ -241,33 +241,97 @@ struct acpi_s3pt_suspend { /******************************************************************************* * - * GTDT - Generic Timer Description Table (ACPI 5.0) + * GTDT - Generic Timer Description Table (ACPI 5.1) * Version 1 * ******************************************************************************/ struct acpi_table_gtdt { struct acpi_table_header header; /* Common ACPI table header */ - u64 address; - u32 flags; - u32 secure_pl1_interrupt; - u32 secure_pl1_flags; - u32 non_secure_pl1_interrupt; - u32 non_secure_pl1_flags; + u64 cnt_control_base_address; + u32 reserved; + u32 secure_el1_interrupt; + u32 secure_el1_flags; + u32 non_secure_el1_interrupt; + u32 non_secure_el1_flags; u32 virtual_timer_interrupt; u32 virtual_timer_flags; - u32 non_secure_pl2_interrupt; - u32 non_secure_pl2_flags; + u32 non_secure_el2_interrupt; + u32 non_secure_el2_flags; + u64 cnt_read_base_address; + u32 platform_timer_count; + u32 platform_timer_offset; }; -/* Values for Flags field above */ +/* Values for all "TimerFlags" fields above */ -#define ACPI_GTDT_MAPPED_BLOCK_PRESENT 1 +#define ACPI_GTDT_INTERRUPT_MODE ( 1 << 0 ) +#define ACPI_GTDT_INTERRUPT_POLARITY ( 1 << 1 ) -/* Values for all "TimerFlags" fields above */ +#define ACPI_GTDT_ALWAYS_ON ( 1 << 2 ) + +/* Values for GTDT subtable type in struct acpi_subtable_header */ + +enum acpi_gtdt_type { + ACPI_GTDT_TYPE_GT_BLOCK = 0, /* memory-mapped generic timer */ + ACPI_GTDT_TYPE_SBSA_GENERIC_WATCHDOG = 1, + ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ +}; + +/* + * GTDT Subtables, correspond to Type in struct acpi_subtable_header + */ + +/* 0: Generic Timer Block */ + +struct acpi_gtdt_gt_block { + struct acpi_subtable_header header; + u16 reserved; + u64 gt_block_address; + u32 gt_block_timer_count; /* must be less than or equal to 8 */ + u32 gt_block_timer_offset; +}; + +/* GT Block Timer Structure */ + +struct acpi_gt_block_timer { + u8 gt_frame_number; + u8 reseved[3]; + u64 cnt_base_address; + u64 cnt_el0_base_adress; + u32 physical_timer_interrupt; + u32 physical_timer_flags; + u32 vitual_timer_interrupt; + u32 vitual_timer_flags; + u32 timer_common_flags; +}; + +/* Flag Definitions: GT Block Physical Timers and Virtual timers */ + +#define ACPI_GT_BLOCK_INTERRUPT_MODE ( 1 << 0 ) +#define ACPI_GT_BLOCK_INTERRUPT_POLARITY ( 1 << 1 ) + +/* Flag Definitions: Common Flags */ + +#define ACPI_GT_BLOCK_IS_SECURE_TIMER ( 1 << 0 ) +#define ACPI_GT_BLOCK_ALWAYS_ON ( 1 << 1 ) + +/* 1: SBSA Generic Watchdog Structure */ + +struct acpi_sbsa_generic_watchdog { + struct acpi_subtable_header header; + u16 reserved; + u64 refresh_frame_address; + u64 control_frame_address; + u32 interrupt; + u32 flags; +}; + +/* Flag Definitions: SBSA Generic Watchdog */ -#define ACPI_GTDT_INTERRUPT_MODE 1 -#define ACPI_GTDT_INTERRUPT_POLARITY 2 +#define ACPI_SBSA_WATCHDOG_INTERRUPT_MODE ( 1 << 0 ) +#define ACPI_SBSA_WATCHDOG_INTERRUPT_POLARITY ( 1 << 1 ) +#define ACPI_SBSA_WATCHDOG_IS_SECURE_TIMER ( 1 << 2 ) /******************************************************************************* * diff --git a/xen/include/asm-arm/acpi.h b/xen/include/asm-arm/acpi.h index 058f343..4a6cb37 100644 --- a/xen/include/asm-arm/acpi.h +++ b/xen/include/asm-arm/acpi.h @@ -46,4 +46,6 @@ static inline void disable_acpi(void) acpi_disabled = 1; } +#define ACPI_GTDT_INTR_MASK ( ACPI_GTDT_INTERRUPT_MODE | ACPI_GTDT_INTERRUPT_POLARITY ) + #endif /*_ASM_ARM_ACPI_H*/