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[50.57.142.19]) by mx.google.com with ESMTPS id wy3si8679832vdc.66.2015.05.17.13.06.11 (version=TLSv1 cipher=RC4-SHA bits=128/128); Sun, 17 May 2015 13:06:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xen.org designates 50.57.142.19 as permitted sender) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Yu4oP-0001v9-Ge; Sun, 17 May 2015 20:05:25 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Yu4oN-0001rY-Mb for xen-devel@lists.xen.org; Sun, 17 May 2015 20:05:23 +0000 Received: from [85.158.139.211] by server-8.bemta-5.messagelabs.com id 44/7C-03747-284F8555; Sun, 17 May 2015 20:05:22 +0000 X-Env-Sender: parth.dixit@linaro.org X-Msg-Ref: server-8.tower-206.messagelabs.com!1431893120!11111137!1 X-Originating-IP: [209.85.192.182] X-SpamReason: No, hits=0.0 required=7.0 tests=UPPERCASE_25_50 X-StarScan-Received: X-StarScan-Version: 6.13.15; banners=-,-,- X-VirusChecked: Checked Received: (qmail 32441 invoked from network); 17 May 2015 20:05:20 -0000 Received: from mail-pd0-f182.google.com (HELO mail-pd0-f182.google.com) (209.85.192.182) by server-8.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 17 May 2015 20:05:20 -0000 Received: by pdea3 with SMTP id a3so116252680pde.2 for ; Sun, 17 May 2015 13:05:19 -0700 (PDT) X-Received: by 10.70.52.130 with SMTP id t2mr28032765pdo.34.1431893119697; Sun, 17 May 2015 13:05:19 -0700 (PDT) Received: from localhost.localdomain ([117.247.24.139]) by mx.google.com with ESMTPSA id j9sm7838401pdm.53.2015.05.17.13.05.15 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 17 May 2015 13:05:19 -0700 (PDT) From: Parth Dixit To: xen-devel@lists.xen.org Date: Mon, 18 May 2015 01:33:41 +0530 Message-Id: <1431893048-5214-15-git-send-email-parth.dixit@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1431893048-5214-1-git-send-email-parth.dixit@linaro.org> References: <1431893048-5214-1-git-send-email-parth.dixit@linaro.org> Cc: keir@xen.org, ian.campbell@citrix.com, andrew.cooper3@citrix.com, tim@xen.org, julien.grall@citrix.com, stefano.stabellini@citrix.com, jbeulich@suse.com, parth.dixit@linaro.org, christoffer.dall@linaro.org Subject: [Xen-devel] [PATCH v2 14/41] arm : acpi add helper function for setting interrupt type X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: parth.dixit@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.42 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: set edge/level type information for an interrupt Signed-off-by: Parth Dixit --- xen/arch/arm/irq.c | 17 +++++++++++++++++ xen/include/asm-arm/acpi.h | 26 ++++++++++++++++++++++++++ xen/include/asm-arm/irq.h | 2 ++ 3 files changed, 45 insertions(+) diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c index 376c9f2..1713935 100644 --- a/xen/arch/arm/irq.c +++ b/xen/arch/arm/irq.c @@ -679,6 +679,23 @@ int platform_get_irq(const struct dt_device_node *device, int index) return irq; } +int set_irq_type(int irq,int type) +{ + int res; + + /* Setup the IRQ type */ + if ( irq < NR_LOCAL_IRQS ) + res = irq_local_set_type(irq, type); + else + res = irq_set_spi_type(irq, type); + + if ( res ) + return -1; + + return 0; + +} + /* * Local variables: * mode: C diff --git a/xen/include/asm-arm/acpi.h b/xen/include/asm-arm/acpi.h index 0845f14..1767143 100644 --- a/xen/include/asm-arm/acpi.h +++ b/xen/include/asm-arm/acpi.h @@ -50,4 +50,30 @@ static inline void disable_acpi(void) #define ACPI_GTDT_INTR_MASK ( ACPI_GTDT_INTERRUPT_MODE | ACPI_GTDT_INTERRUPT_POLARITY ) +/** + * IRQ line type. + * + * ACPI_IRQ_TYPE_NONE - default, unspecified type + * ACPI_IRQ_TYPE_EDGE_RISING - rising edge triggered + * ACPI_IRQ_TYPE_EDGE_FALLING - falling edge triggered + * ACPI_IRQ_TYPE_EDGE_BOTH - rising and falling edge triggered + * ACPI_IRQ_TYPE_LEVEL_HIGH - high level triggered + * ACPI_IRQ_TYPE_LEVEL_LOW - low level triggered + * ACPI_IRQ_TYPE_LEVEL_MASK - Mask to filter out the level bits + * ACPI_IRQ_TYPE_SENSE_MASK - Mask for all the above bits + * ACPI_IRQ_TYPE_INVALID - Use to initialize the type + */ +#define ACPI_IRQ_TYPE_NONE 0x00000000 +#define ACPI_IRQ_TYPE_EDGE_RISING 0x00000001 +#define ACPI_IRQ_TYPE_EDGE_FALLING 0x00000002 +#define ACPI_IRQ_TYPE_EDGE_BOTH \ + (ACPI_IRQ_TYPE_EDGE_FALLING | ACPI_IRQ_TYPE_EDGE_RISING) +#define ACPI_IRQ_TYPE_LEVEL_HIGH 0x00000004 +#define ACPI_IRQ_TYPE_LEVEL_LOW 0x00000008 +#define ACPI_IRQ_TYPE_LEVEL_MASK \ + (ACPI_IRQ_TYPE_LEVEL_LOW | ACPI_IRQ_TYPE_LEVEL_HIGH) +#define ACPI_IRQ_TYPE_SENSE_MASK 0x0000000f + +#define ACPI_IRQ_TYPE_INVALID 0x00000010 + #endif /*_ASM_ARM_ACPI_H*/ diff --git a/xen/include/asm-arm/irq.h b/xen/include/asm-arm/irq.h index 34b492b..ddad0a9 100644 --- a/xen/include/asm-arm/irq.h +++ b/xen/include/asm-arm/irq.h @@ -51,6 +51,8 @@ void arch_move_irqs(struct vcpu *v); /* Set IRQ type for an SPI */ int irq_set_spi_type(unsigned int spi, unsigned int type); +int set_irq_type(int irq,int type); + int platform_get_irq(const struct dt_device_node *device, int index); void irq_set_affinity(struct irq_desc *desc, const cpumask_t *cpu_mask);