From patchwork Mon Aug 26 15:55:28 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 19538 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-yh0-f69.google.com (mail-yh0-f69.google.com [209.85.213.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id A86F7246F3 for ; Mon, 26 Aug 2013 15:55:34 +0000 (UTC) Received: by mail-yh0-f69.google.com with SMTP id f10sf1794902yha.0 for ; Mon, 26 Aug 2013 08:55:34 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:delivered-to:message-id:date:from:user-agent :mime-version:to:cc:subject:references:in-reply-to:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe:content-type :content-transfer-encoding; bh=SSpCzMroAZXZQWHp1YzUp27W/SWq7sOcnCMHQy6Xq0Y=; b=NV8VAnEd5rHqTcAAAsez6TEkplFn7ee64mTzUtsIdq7uZPJO+PHcflP/eKf0J0i+Kb c3Wdxy2kglrW/abHvxIxJFydyOZ7vbaHA1bX60EE7skIPLOX/KayFRK8g4QN+7To6Xjf Fyv8hNyl5iGLWWYbjij2Af9m0FZJ5HqMFAcPA0U2FnzuGE+qKhIJwogYMVIysbgAxEi4 dAXDxxI/Ha9DiJNJtDm1dN/oziqf+OK0KNyZ9fZlV2sU1QYXuHrKZWtxoFUVve2FRYhc 2+x6OpyKcuGPolelwG0wKc3c9uRJCxKkYED5qfg1mBnjdW+dx2h/ATfTPBKQyfV3MDbL YgPw== X-Received: by 10.236.166.35 with SMTP id f23mr5585786yhl.22.1377532533997; Mon, 26 Aug 2013 08:55:33 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.35.233 with SMTP id l9ls2275847qej.60.gmail; Mon, 26 Aug 2013 08:55:33 -0700 (PDT) X-Received: by 10.52.230.74 with SMTP id sw10mr5982705vdc.6.1377532533887; Mon, 26 Aug 2013 08:55:33 -0700 (PDT) Received: from mail-ve0-f175.google.com (mail-ve0-f175.google.com [209.85.128.175]) by mx.google.com with ESMTPS id ed9si3723009vcb.81.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 26 Aug 2013 08:55:33 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.128.175 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.175; Received: by mail-ve0-f175.google.com with SMTP id oy10so2171701veb.6 for ; Mon, 26 Aug 2013 08:55:33 -0700 (PDT) X-Gm-Message-State: ALoCoQl9lpLol2bdTRPsP8aWENL/l7EyX/vAcZeP9ZUmTuVNp8A4VtAhxrbIThFkuN+mk2k07LtP X-Received: by 10.52.76.38 with SMTP id h6mr12516609vdw.10.1377532533557; Mon, 26 Aug 2013 08:55:33 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp242376vcz; Mon, 26 Aug 2013 08:55:32 -0700 (PDT) X-Received: by 10.14.216.3 with SMTP id f3mr751815eep.80.1377532531948; Mon, 26 Aug 2013 08:55:31 -0700 (PDT) Received: from mail-ee0-f51.google.com (mail-ee0-f51.google.com [74.125.83.51]) by mx.google.com with ESMTPS id w44si10605050eef.225.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 26 Aug 2013 08:55:31 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.83.51 is neither permitted nor denied by best guess record for domain of julien.grall@linaro.org) client-ip=74.125.83.51; Received: by mail-ee0-f51.google.com with SMTP id c1so1665409eek.24 for ; Mon, 26 Aug 2013 08:55:31 -0700 (PDT) X-Received: by 10.15.99.72 with SMTP id bk48mr27422635eeb.22.1377532531111; Mon, 26 Aug 2013 08:55:31 -0700 (PDT) Received: from [10.80.2.139] ([185.25.64.249]) by mx.google.com with ESMTPSA id k7sm22289544eeg.13.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 26 Aug 2013 08:55:30 -0700 (PDT) Message-ID: <521B7A70.300@linaro.org> Date: Mon, 26 Aug 2013 16:55:28 +0100 From: Julien Grall User-Agent: Mozilla/5.0 (X11; Linux i686; rv:17.0) Gecko/20130704 Icedove/17.0.7 MIME-Version: 1.0 To: Ian Campbell CC: Andre Przywara , stefano.stabellini@eu.citrix.com, xen-devel@lists.xen.org, patches@linaro.org Subject: Re: [PATCH] PL011: fix reverse logic for interrupt mask register References: <1376406755-23703-1-git-send-email-andre.przywara@linaro.org> <5214E6C2.4080203@linaro.org> <1377156187.31937.87.camel@hastur.hellion.org.uk> In-Reply-To: <1377156187.31937.87.camel@hastur.hellion.org.uk> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.175 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , On 08/22/2013 08:23 AM, Ian Campbell wrote: > On Wed, 2013-08-21 at 17:11 +0100, Julien Grall wrote: >> On 08/13/2013 04:12 PM, Andre Przywara wrote: >>> The PL011 IMSC register description is somehow fuzzy in the >>> documentation; by comparing it with the Linux implementation one can >>> see that the logic is actually reversed to Xen's implementation: >>> A "0" in field means interrupt disabled, a "1" enables it. >>> Therefore we enabled all interrupts instead of disabling them in the >>> beginning and later on masked the wrong interrupts. >>> Unclear how this worked on the Versatile Express, but this fix is >>> needed to get Calxeda Midway running (and works on VExpress, too). >> >> On my Versatile Express, the keyboard is unusable with this patch. >> Xen receives random keys and sometimes nothing is printed on the serial >> port. >> >> By reverting this patch on my tree, I'm able to use correctly the serial >> port. > > :-/ Andre did say this patch worked on vexpress for him. > > I'm pretty certain Andre's patch is correct in its own right. But the > fact that it worked before does seem to imply that there are other > issues with the pl011 driver, it's likely that this change has just > exposed a latent one. > > Could this be related somehow to the baud rate setting change? I > wouldn't have expected so but "random keys" and nothingness could be a > symptom of incorrect baud too. > > Does anyone have time to look into this? > If RTI interrupt are enabled (see small patch below), the UART works perfectly on the versatile express. The PL011 documentation says the bit is used to mask/unmask receive interrupt timeout. I don't understand why this interrupt is useful and the documentation doesn't help me... ====================================================================================== ==================================================================================== diff --git a/xen/drivers/char/pl011.c b/xen/drivers/char/pl011.c index 0e1eb64..e4bd702 100644 --- a/xen/drivers/char/pl011.c +++ b/xen/drivers/char/pl011.c @@ -140,7 +140,7 @@ static void __init pl011_init_postirq(struct serial_port *port) pl011_write(uart, ICR, OEI|BEI|PEI|FEI); /* Unmask interrupts */ - pl011_write(uart, IMSC, OEI|BEI|PEI|FEI|TXI|RXI); + pl011_write(uart, IMSC, RTI|OEI|BEI|PEI|FEI|TXI|RXI); } static void pl011_suspend(struct serial_port *port)