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[50.57.142.19]) by mx.google.com with ESMTPS id 42si17884808qgt.23.2015.02.10.02.28.55 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 10 Feb 2015 02:28:56 -0800 (PST) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1YL824-00034w-Gn; Tue, 10 Feb 2015 10:27:04 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1YL823-00034r-Rc for xen-devel@lists.xen.org; Tue, 10 Feb 2015 10:27:03 +0000 Received: from [193.109.254.147] by server-5.bemta-14.messagelabs.com id A5/77-03170-7FCD9D45; Tue, 10 Feb 2015 10:27:03 +0000 X-Env-Sender: julien.grall@linaro.org X-Msg-Ref: server-5.tower-27.messagelabs.com!1423564020!7824210!1 X-Originating-IP: [209.85.220.54] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 6.13.4; banners=-,-,- X-VirusChecked: Checked Received: (qmail 31141 invoked from network); 10 Feb 2015 10:27:02 -0000 Received: from mail-pa0-f54.google.com (HELO mail-pa0-f54.google.com) (209.85.220.54) by server-5.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 10 Feb 2015 10:27:02 -0000 Received: by mail-pa0-f54.google.com with SMTP id kx10so25285332pab.13 for ; Tue, 10 Feb 2015 02:27:00 -0800 (PST) X-Received: by 10.68.135.97 with SMTP id pr1mr36784577pbb.71.1423564020281; Tue, 10 Feb 2015 02:27:00 -0800 (PST) Received: from Juliens-MacBook-Pro.local ([210.177.145.245]) by mx.google.com with ESMTPSA id ku12sm19063574pab.39.2015.02.10.02.26.57 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 10 Feb 2015 02:26:59 -0800 (PST) Message-ID: <54D9DCF1.1070404@linaro.org> Date: Tue, 10 Feb 2015 18:26:57 +0800 From: Julien Grall User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.10; rv:31.0) Gecko/20100101 Thunderbird/31.4.0 MIME-Version: 1.0 To: Jan Beulich , Parth Dixit References: <1423058539-26403-1-git-send-email-parth.dixit@linaro.org> <1423058539-26403-35-git-send-email-parth.dixit@linaro.org> <54D301DC.6090306@linaro.org> <54D3854E.20702@linaro.org> <54D9D199.3010008@linaro.org> <54D9E51C020000780005E822@mail.emea.novell.com> In-Reply-To: <54D9E51C020000780005E822@mail.emea.novell.com> Cc: tim@xen.org, Stefano Stabellini , Ian Campbell , Christoffer Dall , xen-devel Subject: Re: [Xen-devel] [PATCH RFC 34/35] arm : acpi workarounds for firmware/linux dependencies X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.176 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Hi Jan, On 10/02/2015 18:01, Jan Beulich wrote: >>>> On 10.02.15 at 10:38, wrote: >> Why it's working on x86? This big allocation is done via the boot >> allocator memory (because the system state is early boot). Hopefully, we >> never have to resize it. >> >> On ARM64, ACPI is initialized after the boot allocator has ended, so we >> have to use xmalloc which will return a page-align pointer. >> >> As ACPI on ARM64 will never use the boot allocator, > > How come you're so certain? The reason why on x86 it needs to > be done this way is because of NUMA initialization. Are you not > expecting NUMA to become of interest to ARM? Or if you do, are > you sure you can get away without the same ordering that x86 > uses? I haven't though about it, sorry. Indeed, sooner or later NUMA will be interesting for ARM. So yes, the ACPI initialization has to be done before the boot_end_allocator. I gave a try and it works for me (see patch below). Parth, can you include this patch and drop the change about is_xmalloc_memory? Regards, diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 6651e78..6c7b3bf 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -600,8 +600,6 @@ static void __init setup_mm(unsigned long dtb_paddr, size_t dtb_size) allocator. */ init_xenheap_pages(pfn_to_paddr(xenheap_mfn_start), pfn_to_paddr(boot_mfn_start)); - - end_boot_allocator(); } #else /* CONFIG_ARM_64 */ static void __init setup_mm(unsigned long dtb_paddr, size_t dtb_size) @@ -670,8 +668,6 @@ static void __init setup_mm(unsigned long dtb_paddr, size_t dtb_size) setup_frametable_mappings(ram_start, ram_end); max_page = PFN_DOWN(ram_end); - - end_boot_allocator(); } #endif @@ -741,6 +737,12 @@ void __init start_xen(unsigned long boot_phys_offset, setup_mm(fdt_paddr, fdt_size); +#ifdef CONFIG_ACPI + acpi_boot_table_init(); +#endif + + end_boot_allocator(); + system_state = SYS_STATE_boot; vm_init(); @@ -750,7 +752,6 @@ void __init start_xen(unsigned long boot_phys_offset, */ #if defined(CONFIG_ACPI) && defined(CONFIG_ARM_64) - acpi_boot_table_init(); /* Get the boot CPU's MPIDR before cpu logical map is built */ cpu_logical_map(0) = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;