From patchwork Thu Mar 29 05:17:58 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rusty Russell X-Patchwork-Id: 7515 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 60191199202 for ; Thu, 29 Mar 2012 05:18:33 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 1F7E7A1856E for ; Thu, 29 Mar 2012 05:18:33 +0000 (UTC) Received: by iage36 with SMTP id e36so3405994iag.11 for ; Wed, 28 Mar 2012 22:18:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:in-reply-to:references:user-agent:date:message-id :mime-version:content-type:x-gm-message-state; bh=bFQ+Q9fpUi3gyIT3wh6GoJ4KHqpcU8qPx5LNPrVoC2o=; b=R+IHS2+y22KUd1iFCvM8wWeVvP8fFgc7XMyeTgsDnH0H+22kKHdQ7Xkgej0TWkx0JJ kmkdEgpK7IoRr1lZnykXKWqjp+Bm+BCOVEsNhs6+ZbRZ5HuGf5dMW0TfvMTY1soeEaEM 4ecVoLUftjbWPkFr/BTXfog0uE6QgPDV0e6r08TiFsLuA1nvO8ye22dkyXdOMJYzPqdu XCQR6ZOg+Tnx3Gv5ktsAlWd8D/1oAhWrbXYNF9v4hlj6hZbuv0ooZQTgvRIeDKhe44Sn Bsl72qxh3lgBjy2P/tE6EHQy6MDNeNIDvCI0DGMY07A9RGfuKE4617r7+6qWdmVJC+Oj ARZQ== Received: by 10.50.191.233 with SMTP id hb9mr442820igc.44.1332998312455; Wed, 28 Mar 2012 22:18:32 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.5.205 with SMTP id 13csp21248ibw; Wed, 28 Mar 2012 22:18:31 -0700 (PDT) Received: by 10.68.200.9 with SMTP id jo9mr2605497pbc.19.1332998311589; Wed, 28 Mar 2012 22:18:31 -0700 (PDT) Received: from ozlabs.org (ozlabs.org. [203.10.76.45]) by mx.google.com with ESMTPS id s4si6813102pbn.79.2012.03.28.22.18.31 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 28 Mar 2012 22:18:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of rusty@ozlabs.org designates 203.10.76.45 as permitted sender) client-ip=203.10.76.45; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rusty@ozlabs.org designates 203.10.76.45 as permitted sender) smtp.mail=rusty@ozlabs.org Received: by ozlabs.org (Postfix, from userid 1011) id 48D42B6F62; Thu, 29 Mar 2012 16:18:28 +1100 (EST) From: Rusty Russell To: Christoffer Dall , android-virt@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: patches@linaro.org Subject: [PATCH 3/3] ARM: KVM: Check the cpuid we're being asked to emulate. In-Reply-To: <87y5qkxa88.fsf@rustcorp.com.au> References: <20120312065134.8074.36949.stgit@ubuntu> <87y5qkxa88.fsf@rustcorp.com.au> User-Agent: Notmuch/0.6.1-1 (http://notmuchmail.org) Emacs/23.3.1 (i686-pc-linux-gnu) Date: Thu, 29 Mar 2012 15:47:58 +1030 Message-ID: <87obrgx9x5.fsf@rustcorp.com.au> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQk1FTHT4vyPu23lJoouIbX/TiNU1xHKlmLBVM8xwiwtPqVJ4r0axahKLVcKcxZPSCTB0Qfl As our emulation gets more sophisticated, we need to know what CPU model we're dealing with. Particularly for some of the nastier workarounds. Let's start with Cortex A-15. We can then test the MIDR elsewhere in the code, knowing that it's one of a finite set of allowed values. Signed-off-by: Rusty Russell --- arch/arm/kvm/guest.c | 18 ++++++++++++++++++ 1 files changed, 18 insertions(+), 0 deletions(-) diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c index c0adab0..2195bc9 100644 --- a/arch/arm/kvm/guest.c +++ b/arch/arm/kvm/guest.c @@ -82,6 +82,24 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) { struct kvm_vcpu_regs *vcpu_regs = &vcpu->arch.regs; + u32 impl, var, arch, part; + + /* Check we understand what CPU we're being asked to emulate. */ + impl = (regs->cp15.c0_midr & 0xFF000000) >> 24; + var = (regs->cp15.c0_midr & 0x00F00000) >> 20; + arch = (regs->cp15.c0_midr & 0x000F0000) >> 16; + part = (regs->cp15.c0_midr & 0x0000FFF0) >> 4; + + switch (regs->cp15.c0_midr >> 24) { + case 'A': /* ARM */ + /* Cortex-A15 */ + if (var == 0x2 && arch == 0xF && part == 0xC0F) + break; + else + return -EINVAL; + default: + return -EINVAL; + } memcpy(&(vcpu_regs->usr_regs[0]), regs->regs0_7, sizeof(u32) * 8); memcpy(&(vcpu_regs->usr_regs[8]), regs->usr_regs8_12, sizeof(u32) * 5);