From patchwork Sat Feb 25 03:56:31 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rusty Russell X-Patchwork-Id: 6923 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 7416924594 for ; Sat, 25 Feb 2012 04:01:21 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id F0696A182AA for ; Sat, 25 Feb 2012 04:01:20 +0000 (UTC) Received: by iabz7 with SMTP id z7so5274005iab.11 for ; Fri, 24 Feb 2012 20:01:20 -0800 (PST) Received: from mr.google.com ([10.43.52.74]) by 10.43.52.74 with SMTP id vl10mr5441932icb.55.1330142480493 (num_hops = 1); Fri, 24 Feb 2012 20:01:20 -0800 (PST) Received: by 10.43.52.74 with SMTP id vl10mr4327449icb.55.1330142480406; Fri, 24 Feb 2012 20:01:20 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.11.10 with SMTP id r10csp26465ibr; Fri, 24 Feb 2012 20:01:19 -0800 (PST) Received: by 10.68.237.40 with SMTP id uz8mr12747139pbc.9.1330142478907; Fri, 24 Feb 2012 20:01:18 -0800 (PST) Received: from ozlabs.org (ozlabs.org. [203.10.76.45]) by mx.google.com with ESMTPS id p7si8604086pbk.314.2012.02.24.20.01.17 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 24 Feb 2012 20:01:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of rusty@ozlabs.org designates 203.10.76.45 as permitted sender) client-ip=203.10.76.45; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rusty@ozlabs.org designates 203.10.76.45 as permitted sender) smtp.mail=rusty@ozlabs.org Received: by ozlabs.org (Postfix, from userid 1011) id AA740B6FAF; Sat, 25 Feb 2012 15:01:13 +1100 (EST) From: Rusty Russell To: Peter Maydell Cc: Dave Martin , patches@linaro.org, Marc Zyngier Subject: Re: [PULL] boot-wrappe: boot kernel in Hyp mode In-Reply-To: References: <1329330098-31636-1-git-send-email-dave.martin@linaro.org> <1329330098-31636-2-git-send-email-dave.martin@linaro.org> <87boou8l7g.fsf@rustcorp.com.au> <874nuk7rmf.fsf@rustcorp.com.au> <20120221091923.GA2488@linaro.org> <87hayj616t.fsf@rustcorp.com.au> <877gze5vlp.fsf@rustcorp.com.au> User-Agent: Notmuch/0.6.1-1 (http://notmuchmail.org) Emacs/23.3.1 (i686-pc-linux-gnu) Date: Sat, 25 Feb 2012 14:26:31 +1030 Message-ID: <87wr7b36s0.fsf@rustcorp.com.au> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQlFTtEubL1UxFuIGCD9XUc19PMj+T/+0+pcIRcuxUPXO53oR8Lhlavr2MgYbFtIJAx4cOjm On Fri, 24 Feb 2012 13:20:42 +0000, Peter Maydell wrote: > On 22 February 2012 22:52, Rusty Russell wrote: > > +# GAS needs armv7-a+virt to understand 'hvc'. > > +CPPFLAGS       += -march=armv7-a -Wa,-march=armv7-a+virt -marm > > Rather than this, it would be better to put > .arch_extension virt > > at the top of boot.S (the way we currently do for 'sec' so we can > use smc). Otherwise you'll require everybody with a custom config.mk > to update it with the CPPFLAGS change. Done. Thanks! The following changes since commit 14dcbbd384abc25d475fd2021db3007a22383e46: boot-wrapper: Support reading kernel/initrd via semihosting (2012-02-05 13:07:07 -0500) are available in the git repository at: git://github.com/rustyrussell/boot-wrapper.git rusty-wip Rusty Russell (1): Boot kernel in hyp mode. boot.S | 27 +++++++++++++++++++++++++-- monitor.S | 19 ++++++++++++++----- 2 files changed, 39 insertions(+), 7 deletions(-) commit e7e48bba1b4e577601edf7ddb709c7b3beeaaeb0 Author: Rusty Russell Date: Thu Feb 23 08:20:20 2012 +1030 Boot kernel in hyp mode. Leave the old monitor stub there for the moment, so we can boot current Christoff kernels. We need to pass -march=armv7-a+virt to GAS to use the hvc instruction. Includes fixes by Dave Martin to make it actually work :) Signed-off-by: Rusty Russell diff --git a/boot.S b/boot.S index cf8bdb0..823def8 100644 --- a/boot.S +++ b/boot.S @@ -9,6 +9,7 @@ .syntax unified .arch_extension sec + .arch_extension virt .text #ifdef SEMIHOSTING @@ -104,12 +105,34 @@ _start: orr r0, r0, r1 mcr p15, 0, r0, c1, c1, 2 - @ Change to NS-mode + @ Leave monitor.S trap in place for the transition... mov r0, #0xf0000000 mcr p15, 0, r0, c12, c0, 1 @ Monitor vector base address + + @ Set up hvbar so hvc comes back here. + ldr r0, =vectors + mov r7, #0xfffffff0 + smc #0 @ Set HVBAR + + @ We can't call hvc from secure mode, so drop down first. mov r7, #0xffffffff smc #0 @ Change to NS-mode + @ This is how we enter hyp mode, for booting the next stage. + hvc #0 + +/* Once we get rid of monitor.S, use these smc vectors too! */ +vectors: + .word 0 /* reset */ + .word 0 /* undef */ + .word 0 /* svc */ + .word 0 /* pabt */ + .word 0 /* dabt */ + b into_hyp_mode /* hvc */ + .word 0 /* irq */ + .word 0 /* fiq */ + +into_hyp_mode: @ Check CPU nr again mrc p15, 0, r0, c0, c0, 5 @ MPIDR (ARMv7 only) and r0, r0, #15 @ CPU number @@ -485,7 +508,7 @@ sh_cmdline: @ Semihosting command line will be written here #else /* not SEMIHOSTING */ - .org 0x100 + .org 0x200 @ Static ATAGS for when kernel/etc are compiled into the ELF file atags: @ ATAG_CORE diff --git a/monitor.S b/monitor.S index 052ab1e..dea8551 100644 --- a/monitor.S +++ b/monitor.S @@ -25,7 +25,7 @@ @ 1: ldr sp, =_monitor_stack - push {r11, r12} + push {r10-r12} cmp r7, #0xffffffff beq _non_sec @@ -36,15 +36,20 @@ movnes pc, lr and r12, r7, #0xf cmp r12, #0x0 - popgt {r11, r12} + popgt {r10-r12} movgts pc, lr @ Check the VMID is 0 + mrc p15, 0, r10, c1, c1, 0 @ SCR + orr r11, r10, #1 @ SCR.NS = 1 + mcr p15, 0, r11, c1, c1, 0 + isb mrrc p15, 6, r12, r11, c2 + mcr p15, 0, r10, c1, c1, 0 @ Restore SCR lsr r11, r11, #16 and r11, r11, #0xff cmp r11, #0 - popne {r11, r12} + popne {r10-r12} movnes pc, lr @ Jump to the right function @@ -68,15 +73,19 @@ _non_sec: ldr r11, =0x131 orr r12, r12, r11 mcr p15, 0, r12, c1, c1, 0 - pop {r11, r12} + pop {r10-r12} movs pc, lr @ @ Read/Write HVBAR @ _write_hvbar: + orr r11, r10, #1 @ SCR.NS = 1 (r10 already = SCR) + mcr p15, 0, r11, c1, c1, 0 + isb mcr p15, 4, r0, c12, c0, 0 - pop {r11, r12} + mcr p15, 0, r10, c1, c1, 0 @ Restore SCR + pop {r10-r12} movs pc, lr .ltorg