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[50.57.142.19]) by mx.google.com with ESMTPS id tp5si3195025vcb.67.2014.11.05.07.15.58 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 05 Nov 2014 07:15:58 -0800 (PST) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Xm2HD-0006I9-H6; Wed, 05 Nov 2014 15:13:39 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Xm2HC-0006I4-Dc for xen-devel@lists.xen.org; Wed, 05 Nov 2014 15:13:38 +0000 Received: from [85.158.137.68] by server-11.bemta-3.messagelabs.com id 47/17-25547-1AE3A545; Wed, 05 Nov 2014 15:13:37 +0000 X-Env-Sender: frediano.ziglio@huawei.com X-Msg-Ref: server-7.tower-31.messagelabs.com!1415200415!11833912!1 X-Originating-IP: [206.16.17.72] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMjA2LjE2LjE3LjcyID0+IDE2MDI3\n X-StarScan-Received: X-StarScan-Version: 6.12.4; banners=-,-,- X-VirusChecked: Checked Received: (qmail 10033 invoked from network); 5 Nov 2014 15:13:37 -0000 Received: from dfwrgout.huawei.com (HELO dfwrgout.huawei.com) (206.16.17.72) by server-7.tower-31.messagelabs.com with RC4-SHA encrypted SMTP; 5 Nov 2014 15:13:37 -0000 Received: from 172.18.9.243 (EHLO lhreml401-hub.china.huawei.com) ([172.18.9.243]) by dfwrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id AYY78301; Wed, 05 Nov 2014 09:13:33 -0600 (CST) Received: from LHREML509-MBB.china.huawei.com ([10.201.4.152]) by lhreml401-hub.china.huawei.com ([10.201.5.240]) with mapi id 14.03.0158.001; Wed, 5 Nov 2014 15:13:26 +0000 From: Frediano Ziglio To: Julien Grall , Ian Campbell , Stefano Stabellini , Tim Deegan Thread-Topic: [PATCH v3 8/8] xen/arm: Handle translated addresses for hardware domains Thread-Index: AQHP+Nz5JXxbZDhNFky+GUtoHCI5CpxSFRmAgAAOuCA= Date: Wed, 5 Nov 2014 15:13:26 +0000 Message-ID: References: <1415180475-8339-1-git-send-email-frediano.ziglio@huawei.com> <1415180475-8339-9-git-send-email-frediano.ziglio@huawei.com> <545A31C7.3070202@linaro.org> In-Reply-To: <545A31C7.3070202@linaro.org> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.47.71.64] MIME-Version: 1.0 X-CFilter-Loop: Reflected Cc: Zoltan Kiss , "xen-devel@lists.xen.org" Subject: Re: [Xen-devel] [PATCH v3 8/8] xen/arm: Handle translated addresses for hardware domains X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: frediano.ziglio@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.180 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Content-Language: en-US > Hi Frediano, > > On 11/05/2014 09:41 AM, Frediano Ziglio wrote: > > Translated address could have an offset applied to them. > > Replicate same value for device node to avoid improper address > > computation in the OS. > > > > Signed-off-by: Frediano Ziglio > > --- > > xen/arch/arm/gic-v2.c | 23 +++++++++++++++++++++-- > > 1 file changed, 21 insertions(+), 2 deletions(-) > > > > diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index > > 2f6bbd5..271074d 100644 > > --- a/xen/arch/arm/gic-v2.c > > +++ b/xen/arch/arm/gic-v2.c > > @@ -67,8 +67,10 @@ > > /* Global state */ > > static struct { > > paddr_t dbase; /* Address of distributor registers */ > > + paddr_t dbase_raw; /* Untranslated address of distributor > registers */ > > void __iomem * map_dbase; /* IO mapped Address of distributor > registers */ > > paddr_t cbase; /* Address of CPU interface registers > */ > > + paddr_t cbase_raw; /* Untranslated address of CPU > interface registers */ > > void __iomem * map_cbase[2]; /* IO mapped Address of CPU > interface registers */ > > paddr_t hbase; /* Address of virtual interface > registers */ > > void __iomem * map_hbase; /* IO Address of virtual interface > > registers */ @@ -671,8 +673,17 @@ static int gicv2_make_dt_node(const > struct domain *d, > > return -FDT_ERR_XEN(ENOMEM); > > > > tmp = new_cells; > > - dt_set_range(&tmp, node, d->arch.vgic.dbase, PAGE_SIZE); > > - dt_set_range(&tmp, node, d->arch.vgic.cbase, PAGE_SIZE * 2); > > + > > + if ( is_hardware_domain(d) ) > > + { > > This check is pointless, as said on an earlier version of this series, > gicv2_make_dt_node is only used to create DOM0 (hardware domain) device > tree. > > Regards, > > -- > Julien Grall How does sound something like this (already tested, it's working). Perhaps just to be paranoid a test on len after reading reg property would be perfect. diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 2f6bbd5..2c4d097 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -632,7 +632,7 @@ static int gicv2_make_dt_node(const struct domain *d, const void *compatible = NULL; u32 len; __be32 *new_cells, *tmp; - int res = 0; + int res = 0, na, ns; compatible = dt_get_property(gic, "compatible", &len); if ( !compatible ) @@ -664,15 +664,27 @@ static int gicv2_make_dt_node(const struct domain *d, if ( res ) return res; - len = dt_cells_to_size(dt_n_addr_cells(node) + dt_n_size_cells(node)); + /* copy GICC and GICD regions */ + na = dt_n_addr_cells(node); + ns = dt_n_size_cells(node); + + if ( na != dt_n_addr_cells(gic) || ns != dt_n_size_cells(gic) ) + return -FDT_ERR_XEN(EINVAL); + + tmp = (__be32 *) dt_get_property(gic, "reg", &len); + if ( !tmp ) + { + dprintk(XENLOG_ERR, "Can't find reg property for the gic node\n"); + return -FDT_ERR_XEN(ENOENT); + } + + len = dt_cells_to_size(na + ns); len *= 2; /* GIC has two memory regions: Distributor + CPU interface */ new_cells = xzalloc_bytes(len); if ( new_cells == NULL ) return -FDT_ERR_XEN(ENOMEM); - tmp = new_cells; - dt_set_range(&tmp, node, d->arch.vgic.dbase, PAGE_SIZE); - dt_set_range(&tmp, node, d->arch.vgic.cbase, PAGE_SIZE * 2); + memcpy(new_cells, tmp, len); res = fdt_property(fdt, "reg", new_cells, len); xfree(new_cells);