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[50.57.142.19]) by mx.google.com with ESMTPS id so10si3239228vdc.82.2014.11.05.08.04.19 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 05 Nov 2014 08:04:20 -0800 (PST) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Xm32N-0008He-8p; Wed, 05 Nov 2014 16:02:23 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Xm32M-0008HZ-9P for xen-devel@lists.xen.org; Wed, 05 Nov 2014 16:02:22 +0000 Received: from [85.158.137.68] by server-13.bemta-3.messagelabs.com id 40/F9-27623-D0A4A545; Wed, 05 Nov 2014 16:02:21 +0000 X-Env-Sender: frediano.ziglio@huawei.com X-Msg-Ref: server-16.tower-31.messagelabs.com!1415203339!11862596!1 X-Originating-IP: [206.16.17.72] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMjA2LjE2LjE3LjcyID0+IDE2MDI3\n X-StarScan-Received: X-StarScan-Version: 6.12.4; banners=-,-,- X-VirusChecked: Checked Received: (qmail 23151 invoked from network); 5 Nov 2014 16:02:20 -0000 Received: from dfwrgout.huawei.com (HELO dfwrgout.huawei.com) (206.16.17.72) by server-16.tower-31.messagelabs.com with RC4-SHA encrypted SMTP; 5 Nov 2014 16:02:20 -0000 Received: from 172.18.9.243 (EHLO lhreml406-hub.china.huawei.com) ([172.18.9.243]) by dfwrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CHR84505; Wed, 05 Nov 2014 10:02:16 -0600 (CST) Received: from LHREML509-MBB.china.huawei.com ([10.201.4.152]) by lhreml406-hub.china.huawei.com ([10.201.5.243]) with mapi id 14.03.0158.001; Wed, 5 Nov 2014 16:02:07 +0000 From: Frediano Ziglio To: Julien Grall , Ian Campbell , Stefano Stabellini , Tim Deegan Thread-Topic: [PATCH v3 8/8] xen/arm: Handle translated addresses for hardware domains Thread-Index: AQHP+Nz5JXxbZDhNFky+GUtoHCI5CpxSFRmAgAAOuCCAAATYAIAABJGggAABxgCAAAAogIAAAk0w Date: Wed, 5 Nov 2014 16:02:06 +0000 Message-ID: References: <1415180475-8339-1-git-send-email-frediano.ziglio@huawei.com> <1415180475-8339-9-git-send-email-frediano.ziglio@huawei.com> <545A31C7.3070202@linaro.org> <545A4230.9030506@linaro.org> <545A4782.3050107@linaro.org> <545A47A3.6090707@linaro.org> In-Reply-To: <545A47A3.6090707@linaro.org> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.47.71.64] MIME-Version: 1.0 X-CFilter-Loop: Reflected Cc: Zoltan Kiss , "xen-devel@lists.xen.org" Subject: Re: [Xen-devel] [PATCH v3 8/8] xen/arm: Handle translated addresses for hardware domains X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: frediano.ziglio@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.49 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Content-Language: en-US > On 11/05/2014 03:51 PM, Julien Grall wrote: > >> diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index > >> 2f6bbd5..9b9e696 100644 > >> --- a/xen/arch/arm/gic-v2.c > >> +++ b/xen/arch/arm/gic-v2.c > >> @@ -629,9 +629,8 @@ static int gicv2_make_dt_node(const struct > domain *d, > >> const struct dt_device_node *node, > >> void *fdt) { > >> const struct dt_device_node *gic = dt_interrupt_controller; > >> - const void *compatible = NULL; > >> + const void *compatible = NULL, *tmp; > >> u32 len; > >> - __be32 *new_cells, *tmp; > > > > I would prefer if you keep tmp as __be32 *. It documents the real > type > > of the data. Also, for clarity, I would rename it to cells. > > s/cells/regs/. Sorry > > -- > Julien Grall This version should be perfect then. Subject: [PATCH 7/7] xen/arm: Handle translated addresses for hardware domains in GICv2 Translated address could have an offset applied to them. Replicate same value for device node to avoid improper address computation in the OS. Signed-off-by: Frediano Ziglio --- xen/arch/arm/gic-v2.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 2f6bbd5..c2666df 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -631,7 +631,7 @@ static int gicv2_make_dt_node(const struct domain *d, const struct dt_device_node *gic = dt_interrupt_controller; const void *compatible = NULL; u32 len; - __be32 *new_cells, *tmp; + const __be32 *regs; int res = 0; compatible = dt_get_property(gic, "compatible", &len); @@ -664,18 +664,18 @@ static int gicv2_make_dt_node(const struct domain *d, if ( res ) return res; + /* copy GICC and GICD regions */ + regs = dt_get_property(gic, "reg", &len); + if ( !regs ) + { + dprintk(XENLOG_ERR, "Can't find reg property for the gic node\n"); + return -FDT_ERR_XEN(ENOENT); + } + len = dt_cells_to_size(dt_n_addr_cells(node) + dt_n_size_cells(node)); len *= 2; /* GIC has two memory regions: Distributor + CPU interface */ - new_cells = xzalloc_bytes(len); - if ( new_cells == NULL ) - return -FDT_ERR_XEN(ENOMEM); - - tmp = new_cells; - dt_set_range(&tmp, node, d->arch.vgic.dbase, PAGE_SIZE); - dt_set_range(&tmp, node, d->arch.vgic.cbase, PAGE_SIZE * 2); - res = fdt_property(fdt, "reg", new_cells, len); - xfree(new_cells); + res = fdt_property(fdt, "reg", regs, len); return res; }