From patchwork Fri Oct 2 12:18:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 54421 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f198.google.com (mail-wi0-f198.google.com [209.85.212.198]) by patches.linaro.org (Postfix) with ESMTPS id 45E1823009 for ; Fri, 2 Oct 2015 12:20:16 +0000 (UTC) Received: by wisv5 with SMTP id v5sf7440987wis.0 for ; Fri, 02 Oct 2015 05:20:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:mime-version:in-reply-to:references :date:message-id:from:to:cc:subject:precedence:list-id :list-unsubscribe:list-post:list-help:list-subscribe:content-type :content-transfer-encoding:sender:errors-to:x-original-sender :x-original-authentication-results:mailing-list:list-archive; bh=NPH69jfxVQSzuXhyqyZR/+GY44J2w7X2x549h7bAcco=; b=gi+UMILtMVw2P+dJvdZULqHRMIwEhcEpur4gzvNqlb2seImtuBmGzdOxFpIhXT38qN A+hAvJaSrUlI5RSlNiia7ken+2iwsJrSbHZObCTAkGsPik1xWmS3WQjKn5LeQhorfMld saTVVDiUwVfPBz91WlKPlCJJtFuiO4eaJWAtOymlPQyaOh7wF8+5LmDcUHCahehwU1wm bd2bHR/yIoc4zaeBmE6zOplRUQjexVcdQnng1beTk8MV0St6fytee5nQixoCT4weJwzB ydwRNbEuXfeWGRso8ak91uFAzMnseyLepImqzWIsTSQ+/3QykagijbWfh2EjN4/WDOyg 1jLQ== X-Gm-Message-State: ALoCoQl7e1xjmH2D89noOICZc3MCtLFHuQZg7LFE02XfLy3jIB7pK8XOxbmrBaKx3ul7SDDhiIF4 X-Received: by 10.112.130.41 with SMTP id ob9mr2501865lbb.17.1443788415594; Fri, 02 Oct 2015 05:20:15 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.25.17.216 with SMTP id 85ls207850lfr.24.gmail; Fri, 02 Oct 2015 05:20:15 -0700 (PDT) X-Received: by 10.112.16.199 with SMTP id i7mr5358350lbd.105.1443788415454; Fri, 02 Oct 2015 05:20:15 -0700 (PDT) Received: from mail-lb0-f175.google.com (mail-lb0-f175.google.com. [209.85.217.175]) by mx.google.com with ESMTPS id m39si6074438lfi.11.2015.10.02.05.20.15 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 02 Oct 2015 05:20:15 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.175 as permitted sender) client-ip=209.85.217.175; Received: by lbos8 with SMTP id s8so25392194lbo.0 for ; Fri, 02 Oct 2015 05:20:15 -0700 (PDT) X-Received: by 10.25.20.80 with SMTP id k77mr3532122lfi.117.1443788415304; Fri, 02 Oct 2015 05:20:15 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.59.35 with SMTP id w3csp1201966lbq; Fri, 2 Oct 2015 05:20:13 -0700 (PDT) X-Received: by 10.140.19.227 with SMTP id 90mr18981653qgh.51.1443788413504; Fri, 02 Oct 2015 05:20:13 -0700 (PDT) Received: from lists.xen.org (lists.xen.org. [50.57.142.19]) by mx.google.com with ESMTPS id a33si10011557qga.123.2015.10.02.05.20.13 (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 02 Oct 2015 05:20:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xen.org designates 50.57.142.19 as permitted sender) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1ZhzIY-0003j9-Ed; Fri, 02 Oct 2015 12:18:50 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1ZhzIX-0003iy-6D for xen-devel@lists.xen.org; Fri, 02 Oct 2015 12:18:49 +0000 Received: from [193.109.254.147] by server-8.bemta-14.messagelabs.com id F1/93-19110-8267E065; Fri, 02 Oct 2015 12:18:48 +0000 X-Env-Sender: ard.biesheuvel@linaro.org X-Msg-Ref: server-12.tower-27.messagelabs.com!1443788326!55151400!1 X-Originating-IP: [209.85.213.173] X-SpamReason: No, hits=0.8 required=7.0 tests=BODY_RANDOM_LONG, RCVD_BY_IP X-StarScan-Received: X-StarScan-Version: 6.13.16; banners=-,-,- X-VirusChecked: Checked Received: (qmail 1487 invoked from network); 2 Oct 2015 12:18:47 -0000 Received: from mail-ig0-f173.google.com (HELO mail-ig0-f173.google.com) (209.85.213.173) by server-12.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 2 Oct 2015 12:18:47 -0000 Received: by igbkq10 with SMTP id kq10so15676520igb.0 for ; Fri, 02 Oct 2015 05:18:46 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.50.61.137 with SMTP id p9mr3813867igr.37.1443788326138; Fri, 02 Oct 2015 05:18:46 -0700 (PDT) Received: by 10.36.37.11 with HTTP; Fri, 2 Oct 2015 05:18:46 -0700 (PDT) In-Reply-To: References: <560D5831.6080403@citrix.com> Date: Fri, 2 Oct 2015 14:18:46 +0200 Message-ID: From: Ard Biesheuvel To: Julien Grall Cc: Ian Campbell , Stefano Stabellini , "edk2-devel@lists.01.org" , Leif Lindholm , "xen-devel@lists.xen.org" , Julien Grall , Heyi Guo Subject: Re: [Xen-devel] Unable to use EFI firmware in Xen ARM guest after 41f8901 X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.175 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: On 1 October 2015 at 18:32, Julien Grall wrote: > > On 1 Oct 2015 17:07, "Ard Biesheuvel" wrote: >> >> On 1 October 2015 at 17:58, Julien Grall wrote: >> > Hi, >> > >> > We tried today to use the UEFI binary provided by Linaro for Xen [1] and >> > noticed the guest doesn't boot anymore. >> > >> >> Thanks for reporting. My LAVA job appears to have been offline for a >> while because the Xen mustang dom0 kernel has disappeared. > > FWIW, everything to support X-gene and Xen should be upstreamed. > So you could use a normal Linux for Dom0. > > FIY, Im planning to add a test in our CI loop to check the UEFI firmware. > Great! Would be good to have some independent verification, especially since the (lack of) CI-to-LAVA integration still requires me to go look at the artifacts manually. >> >> > My bisector fingered the commit 41f890164bc201f69841309c6b55e24c64121960 >> > "ArmPkg/Mmu: Fix literal number left shift bug". >> > >> >> Do you mean reverting just this patch fixes it for you? > > Yes, building the UEFI with the commit just before allows me to reach the > UEFI console. > >> > I've tried to use the DEBUG firmware but didn't get any output at all. >> > >> > The guest has been created with 512MB in one memory bank >> > (0x40000000-0x60000000). The binary are loaded at: >> > UEFI firmware: 0x40080000 >> > DTB: 0x48000000 >> > >> > Does anyone have any insight what could go wrong? >> > >> >> I will investigate. The change itself seems obviously correct (but >> don't they always :-)) > OK, so the change was obviously correct, but the rest of the code is not. Instead of erroneously mapping large naturally aligned regions down to 2 MB blocks, the MMU code now notices that the single cacheable 1:1 memory region that I define for Xen domU [which spans the entire (I)PA space] could potentially be mapped using level 0 block entries of 512 GB each. Only, the architecture does not actually support that. Could you please try this patch and see if it fixes things? --------8<---------- we need to go to the page below. // The PageLevel was calculated on the Base Address alignment but did not take in account the alignment --------8<---------- As an aside, it is probably not necessary to make the 1:1 region as large as I am doing, especially since it now turns out that we need to map it in 1 GB blocks and use 4 levels. Is there any reasonable upper bound to the domU PA space other than what is communicated in the ID registers? Tested-by: Stefano Stabellini diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c index d98769b06b75..c84c872dbe60 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c @@ -303,8 +303,9 @@ GetBlockEntryListFromAddress ( } } - // Identify the Page Level the RegionStart must belongs to - PageLevel = 3 - ((BaseAddressAlignment - 12) / 9); + // Identify the Page Level the RegionStart must belong to. Note that PageLevel + // should be at least 1 since block translations are not supported at level 0 + PageLevel = MAX (3 - ((BaseAddressAlignment - 12) / 9), 1); // If the required size is smaller than the current block size then