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X-Received-From: 2a00:1450:400c:c0c::244 Subject: [Qemu-devel] [PATCH v2 0/3] refactor float-to-float conversions and fix AHP X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Hi, This is a more polished version of the re-factoring of the softfloat fcvt code. I've split apart the fixes for ARM alternative half-precision format for easier review. Rather than rely on some questionable hacks it introduces a new FloatFmt to allow cleaner handling of the differences in the common code. If there are other alternative floating point formats they can follow a similar approach. I've included the test case for reference although I expect it to be merged with my tcg-testing revival code which has the rest of the build and test machinery for the test case. checkpatch dumps a bunch of false-positives as it doesn't like scientific notation for floats or inline assembler used in the test case. Cheers, Alex Bennée (3): fpu/softfloat: re-factor float to float conversions fpu/softfloat: support ARM Alternative half-precision tests/tcg/aarch64: add fcvt test cases for AArch64 (!UPSTREAM) fpu/softfloat-specialize.h | 40 - fpu/softfloat.c | 524 +++------ include/fpu/softfloat.h | 8 +- tests/tcg/aarch64/fcvt.c | 296 +++++ tests/tcg/aarch64/fcvt.ref | 2138 ++++++++++++++++++++++++++++++++++++ 5 files changed, 2588 insertions(+), 418 deletions(-) create mode 100644 tests/tcg/aarch64/fcvt.c create mode 100644 tests/tcg/aarch64/fcvt.ref -- 2.17.0 Reviewed-by: Richard Henderson