| Message ID | 20180702160546.31969-1-richard.henderson@linaro.org |
|---|---|
| Headers | show |
| Series | tcg queued patches | expand |
On 2 July 2018 at 17:05, Richard Henderson <richard.henderson@linaro.org> wrote: > The following changes since commit 2d58e33ec1b76990f09bc1e3412e0b36e1ac4634: > > Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-3.0-pull-request' into staging (2018-07-02 13:43:10 +0100) > > are available in the Git repository at: > > https://github.com/rth7680/qemu.git tags/pull-tcg-20180702 > > for you to fetch changes up to 9c8c334b0637bf3c592d432b0c11f3b62dd5dba3: > > cpu: Assert asidx_from_attrs return value in range (2018-07-02 08:09:49 -0700) > > ---------------------------------------------------------------- > Assorted tlb and tb caching fixes > > ---------------------------------------------------------------- > Emilio G. Cota (1): > translate-all: fix locking of TBs whose two pages share the same physical page > > Peter Maydell (3): > tcg: Define and use new tlb_hit() and tlb_hit_page() functions > accel/tcg: Correct "is this a TLB miss" check in get_page_addr_code() > accel/tcg: Don't treat invalid TLB entries as needing recheck > > Richard Henderson (2): > accel/tcg: Avoid caching overwritten tlb entries > cpu: Assert asidx_from_attrs return value in range Applied, thanks. -- PMM
The following changes since commit 2d58e33ec1b76990f09bc1e3412e0b36e1ac4634: Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-3.0-pull-request' into staging (2018-07-02 13:43:10 +0100) are available in the Git repository at: https://github.com/rth7680/qemu.git tags/pull-tcg-20180702 for you to fetch changes up to 9c8c334b0637bf3c592d432b0c11f3b62dd5dba3: cpu: Assert asidx_from_attrs return value in range (2018-07-02 08:09:49 -0700) ---------------------------------------------------------------- Assorted tlb and tb caching fixes ---------------------------------------------------------------- Emilio G. Cota (1): translate-all: fix locking of TBs whose two pages share the same physical page Peter Maydell (3): tcg: Define and use new tlb_hit() and tlb_hit_page() functions accel/tcg: Correct "is this a TLB miss" check in get_page_addr_code() accel/tcg: Don't treat invalid TLB entries as needing recheck Richard Henderson (2): accel/tcg: Avoid caching overwritten tlb entries cpu: Assert asidx_from_attrs return value in range accel/tcg/softmmu_template.h | 16 ++++----- include/exec/cpu-all.h | 23 +++++++++++++ include/exec/cpu_ldst.h | 3 +- include/qom/cpu.h | 6 ++-- accel/tcg/cputlb.c | 78 +++++++++++++++++++++++--------------------- accel/tcg/translate-all.c | 32 ++++++++++++++---- 6 files changed, 100 insertions(+), 58 deletions(-)