From patchwork Wed May 1 05:05:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 163177 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp4120410ill; Tue, 30 Apr 2019 22:06:18 -0700 (PDT) X-Google-Smtp-Source: APXvYqwWTEtF6vmBnbPUG3ccpJgo9b3Wj6V4MavdmFDu/q2ann7dd+FlazlOq1rAFFoiXPGWF3ns X-Received: by 2002:a7b:cf2b:: with SMTP id m11mr5242220wmg.56.1556687177981; Tue, 30 Apr 2019 22:06:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556687177; cv=none; d=google.com; s=arc-20160816; b=cah4+CBKxLdiC59oDKkypJKtH/NSHAVabHV8l+zDFsEZt7+dTQUPKdj8ohNr+Uy059 j/oFB5eVlf8+9QsQa4xw8IcKYbr0o7Ajhxcdz9qoddf8UBEgxjrjFwyik7muyRqyiGxw Jz1Xl+G0m3J82koD6few+WUfNPQX1ZinlgO2Z4to18E8IIvGttxBse8BPf1vQM3e8hnH eo7yTsPt2ATte9HCN+aOBsd+hbaF8787L8RZcJMR1Z8P37dD0CmR6ZJjeG4zz6z5jOAj j1cRriOYtv07QiDG8w9yiaqaFzkz+VSiRb3IfqU/UlGFwv8X59TiBbbHaC8+QGTyb2r6 aTYg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:message-id:date:to:from :dkim-signature; bh=W7dMLs9xpvO28pv1fCklnXo40vBBPmy9BmzHgMTS02Q=; b=GTC2dU3xlw5Fz7S9SbDyio7iDpO9+8oZB+cndLxVZD7hKDY75skT0P2PbHGBZXyQFm QAZm0uNNUQhnbLNoy3iyA/95r+ysl977W/hV6VsNPzj9B5VX0kuuLtKfuva2Sj4+LEf8 JqplpaS/+RX6L1VO2dekCDmQxn5lx1c8Eyo5m98X5f6w5CMO91v1vCynJhstQMq1+gIU sWCGVurg6Yf5SX+RXAjN1qaLGJ3RybvhJzqtPKwU9MsmmaWTABRfMWmhawAdnYgont9O tDu+gx2AmXoY7dT5VU7cQti8k7krzwRhRjsgPpkADxm27q449meZzpK92/zZVT3c8sWF Zy0g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=RHWtrOj5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id g4si4088959wrm.56.2019.04.30.22.06.17 for (version=TLS1 cipher=AES128-SHA bits=128/128); Tue, 30 Apr 2019 22:06:17 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=RHWtrOj5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1]:36213 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hLhRh-0006LQ-0I for patch@linaro.org; Wed, 01 May 2019 01:06:17 -0400 Received: from eggs.gnu.org ([209.51.188.92]:38202) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hLhRG-0006Kq-FE for qemu-devel@nongnu.org; Wed, 01 May 2019 01:05:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hLhRB-0002ml-Tn for qemu-devel@nongnu.org; Wed, 01 May 2019 01:05:50 -0400 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]:43644) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hLhRB-0002mP-N6 for qemu-devel@nongnu.org; Wed, 01 May 2019 01:05:45 -0400 Received: by mail-pl1-x62e.google.com with SMTP id n8so7743370plp.10 for ; Tue, 30 Apr 2019 22:05:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=W7dMLs9xpvO28pv1fCklnXo40vBBPmy9BmzHgMTS02Q=; b=RHWtrOj5EckKl8+PDm7/s0jhtr1oSkJpnZM4i9Wq/mgsdfx76X9f1OOHmjtOXxBACe NVOxRJXz7jK22L8CuMHZABxvYMQ+oy4TdiX4GcgMYcwqwxS0VoTtBdMeRgyfLQoitpeU pW+pbGnnizHu0eGG+jl6Xvlab463f91SCNOgojWfS49dnX9WnERAn/t760iOVtKGE53P Rz99yma5y7u1M+D27c35OXC5JzjWX1V9VLLfWWcZinjDxeUjV5ayvFSNPhjV6VgcuO6Q u/HXZd1RD+5upCDYqqo96VqKwSskn0JyWQQZk3E4ri8TgqD3F+gBYJFyrGLotjER3p6A OsbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=W7dMLs9xpvO28pv1fCklnXo40vBBPmy9BmzHgMTS02Q=; b=Bd9CEiKId1Nqk9BjA1kIaPkCSnHaPLRY3rBDpktCru+CliW7J48OSyaWt6ui0TzPK/ nhrKl9JwpJpyDnC/5ANuRTZR4vkc300WC1vB9v3NITR4T1iOBA2lST9H/swloc8M3XG5 scGBdcR2U2zH8fsAnXG/od1vtTt/ED/kgajFT2REJGFlUn4Qx8MRzl+7kg9OkcEHC2mp +Q1ukIMu6tFBIfpL9AlT5ezIm5wfJbUkpsn88MfdnVNDUlL4Ep1vUzmxTOioFWfqjIm8 6T7wIad2Qqs0+wUcn020O69e6RdHhTvLyDQDwv4Q3yYLeanHKfWozth2JnkB2r/+YBzR eMyg== X-Gm-Message-State: APjAAAUrkGPAGYhl2f7tZZBlGecmocOBgRcTETlN38/VEWtq2ID38uYj FSlEaaQvzg01HwuRldMuZxHS8vg0ikE= X-Received: by 2002:a17:902:b48a:: with SMTP id y10mr16166675plr.86.1556687143856; Tue, 30 Apr 2019 22:05:43 -0700 (PDT) Received: from localhost.localdomain (97-113-189-189.tukw.qwest.net. [97.113.189.189]) by smtp.gmail.com with ESMTPSA id t127sm9687251pfb.106.2019.04.30.22.05.42 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 30 Apr 2019 22:05:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 30 Apr 2019 22:05:07 -0700 Message-Id: <20190501050536.15580-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::62e Subject: [Qemu-devel] [PATCH v2 00/29] tcg vector improvements X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Changes since v1: * Postponing vector select. I plan to re-work that. * Postponing some of the target/* changes. I plan to submit most of those separately via the appropriate trees. The exception is abs(), which I'm still doing here. r~ David Hildenbrand (1): tcg: Implement tcg_gen_gvec_3i() Philippe Mathieu-Daudé (2): target/ppc: Use tcg_gen_abs_i32 target/tricore: Use tcg_gen_abs_tl Richard Henderson (26): tcg: Do not recreate INDEX_op_neg_vec unless supported tcg: Allow add_vec, sub_vec, neg_vec, not_vec to be expanded tcg: Specify optional vector requirements with a list tcg: Assert fixed_reg is read-only tcg: Return bool success from tcg_out_mov tcg: Support cross-class moves without instruction support tcg: Promote tcg_out_{dup,dupi}_vec to backend interface tcg: Manually expand INDEX_op_dup_vec tcg: Add tcg_out_dupm_vec to the backend interface tcg/i386: Implement tcg_out_dupm_vec tcg/aarch64: Implement tcg_out_dupm_vec tcg: Add INDEX_op_dup_mem_vec tcg: Add gvec expanders for variable shift tcg/i386: Support vector variable shift opcodes tcg/aarch64: Support vector variable shift opcodes tcg: Add gvec expanders for vector shift by scalar tcg/i386: Support vector scalar shift opcodes tcg: Add support for integer absolute value tcg: Add support for vector absolute value tcg/i386: Support vector absolute value tcg/aarch64: Support vector absolute value target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs target/cris: Use tcg_gen_abs_tl target/ppc: Use tcg_gen_abs_tl target/s390x: Use tcg_gen_abs_i64 target/xtensa: Use tcg_gen_abs_i32 accel/tcg/tcg-runtime.h | 20 + target/arm/helper.h | 2 - tcg/aarch64/tcg-target.h | 3 +- tcg/aarch64/tcg-target.opc.h | 2 + tcg/i386/tcg-target.h | 5 +- tcg/tcg-op-gvec.h | 64 +- tcg/tcg-op.h | 14 + tcg/tcg-opc.h | 2 + tcg/tcg.h | 21 + accel/tcg/tcg-runtime-gvec.c | 192 ++++++ target/arm/neon_helper.c | 5 - target/arm/translate-a64.c | 41 +- target/arm/translate-sve.c | 9 +- target/arm/translate.c | 144 +++-- target/cris/translate.c | 9 +- target/ppc/translate.c | 68 +- target/ppc/translate/spe-impl.inc.c | 14 +- target/ppc/translate/vmx-impl.inc.c | 7 +- target/s390x/translate.c | 8 +- target/tricore/translate.c | 27 +- target/xtensa/translate.c | 9 +- tcg/aarch64/tcg-target.inc.c | 118 +++- tcg/arm/tcg-target.inc.c | 7 +- tcg/i386/tcg-target.inc.c | 163 ++++- tcg/mips/tcg-target.inc.c | 3 +- tcg/optimize.c | 8 +- tcg/ppc/tcg-target.inc.c | 3 +- tcg/riscv/tcg-target.inc.c | 5 +- tcg/s390/tcg-target.inc.c | 3 +- tcg/sparc/tcg-target.inc.c | 3 +- tcg/tcg-op-gvec.c | 935 +++++++++++++++++++++++----- tcg/tcg-op-vec.c | 270 +++++++- tcg/tcg-op.c | 20 + tcg/tcg.c | 262 ++++++-- tcg/tci/tcg-target.inc.c | 3 +- tcg/README | 4 + 36 files changed, 2002 insertions(+), 471 deletions(-) -- 2.17.1