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[174.21.149.226]) by smtp.gmail.com with ESMTPSA id i187sm22398382pfc.112.2020.04.18.09.19.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Apr 2020 09:19:16 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 00/16] tcg: Better handling of constants Date: Sat, 18 Apr 2020 09:18:58 -0700 Message-Id: <20200418161914.4387-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1032 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This promotes constants to full-fledged temporaries, which are then hashed so we have only a single copy across the TB. If an opcode requires forcing one into a register, then we will only do this once -- at least until the register is killed, e.g. by a function call. While this is probably an modest improvement for integer code, it is significant for SVE vector code. In particular, where a generator function loads a constant for the operation, and then the generator function is called N times for the N x 128-bit vector. Previously we'd be loading up the same constant N times and now we do so only once. The existing tcg_const_{type}() functions are unchanged, allocating a new temporary and initializing it. The constant propagation pass of the optimizer will generally remove the temporary when it turns out not to be modified further. This adds new tcg_constant_{type}() functions which produce a read-only temporary containing the constant which need not be freed. I have updated the generic expanders to take advantage of this, but have not touched the target front ends. This also, in the end, allows the complete removal of the tcg opcodes that create a constant: INDEX_op_movi_{i32,i64} and INDEX_op_dupi_vec. Loading of constants into hard registers is completely controlled by the register allocator. r~ Richard Henderson (16): tcg: Add temp_readonly tcg: Introduce TYPE_CONST temporaries tcg: Use tcg_constant_i32 with icount expander tcg: Use tcg_constant_{i32,i64} with tcg int expanders tcg: Use tcg_constant_{i32,vec} with tcg vec expanders tcg: Use tcg_constant_{i32,i64} with tcg plugins tcg: Rename struct tcg_temp_info to TempOptInfo tcg/optimize: Adjust TempOptInfo allocation tcg/optimize: Use tcg_constant_internal with constant folding tcg/tci: Add special tci_movi_{i32,i64} opcodes tcg: Remove movi and dupi opcodes tcg: Use tcg_out_dupi_vec from temp_load tcg: Increase tcg_out_dupi_vec immediate to int64_t tcg: Add tcg_reg_alloc_dup2 tcg/i386: Use tcg_constant_vec with tcg vec expanders tcg: Remove tcg_gen_dup{8,16,32,64}i_vec include/exec/gen-icount.h | 25 ++-- include/tcg/tcg-op.h | 17 +-- include/tcg/tcg-opc.h | 11 +- include/tcg/tcg.h | 30 +++++ accel/tcg/plugin-gen.c | 49 ++++--- tcg/aarch64/tcg-target.inc.c | 12 +- tcg/arm/tcg-target.inc.c | 1 - tcg/i386/tcg-target.inc.c | 110 +++++++++------- tcg/mips/tcg-target.inc.c | 2 - tcg/optimize.c | 204 ++++++++++++++--------------- tcg/ppc/tcg-target.inc.c | 24 ++-- tcg/riscv/tcg-target.inc.c | 2 - tcg/s390/tcg-target.inc.c | 2 - tcg/sparc/tcg-target.inc.c | 2 - tcg/tcg-op-vec.c | 83 ++++++------ tcg/tcg-op.c | 216 ++++++++++++++---------------- tcg/tcg.c | 246 +++++++++++++++++++++++++++++------ tcg/tci.c | 4 +- tcg/tci/tcg-target.inc.c | 6 +- 19 files changed, 602 insertions(+), 444 deletions(-) -- 2.20.1