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[174.21.149.226]) by smtp.gmail.com with ESMTPSA id m4sm3673561pfm.26.2020.04.21.18.17.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Apr 2020 18:17:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 00/36] tcg 5.1 omnibus patch set Date: Tue, 21 Apr 2020 18:16:46 -0700 Message-Id: <20200422011722.13287-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42e.google.com X-detected-operating-system: by eggs.gnu.org: Error: [-] PROGRAM ABORT : Malformed IPv6 address (bad octet value). Location : parse_addr6(), p0f-client.c:67 X-Received-From: 2607:f8b0:4864:20::42e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" For v1, I had split this into 4 logically distinct parts. But apparently there are minor interdependencies, because the later sets would not apply standalone, says Alex. Rather than tease them apart, and then have to undo that work in order to actually apply them later, I'll just lump them. So: Part 1, patches 1-7, tcg_gen_gvec_dup_imm, is reviewed. Part 2, patch 8, vector tail clearing, is reviewed, and I have moved the target/arm patches into a different queue. Part 3, patches 9-25, TYPE_CONST temporaries, is mostly unreviewed. Part 4, patch 26, load_dest for GVecGen2, a support patch for SVE2. Part 5, patches 27-36, add vector rotate patterns, is brand new. I include two demonstrators for target/ppc and target/s390x. It will also be used by SVE2. r~ Richard Henderson (36): tcg: Add tcg_gen_gvec_dup_imm target/s390x: Use tcg_gen_gvec_dup_imm target/ppc: Use tcg_gen_gvec_dup_imm target/arm: Use tcg_gen_gvec_dup_imm tcg: Use tcg_gen_gvec_dup_imm in logical simplifications tcg: Remove tcg_gen_gvec_dup{8,16,32,64}i tcg: Add tcg_gen_gvec_dup_tl tcg: Improve vector tail clearing tcg: Consolidate 3 bits into enum TCGTempKind tcg: Add temp_readonly tcg: Introduce TYPE_CONST temporaries tcg: Use tcg_constant_i32 with icount expander tcg: Use tcg_constant_{i32,i64} with tcg int expanders tcg: Use tcg_constant_{i32,vec} with tcg vec expanders tcg: Use tcg_constant_{i32,i64} with tcg plugins tcg: Rename struct tcg_temp_info to TempOptInfo tcg/optimize: Adjust TempOptInfo allocation tcg/optimize: Use tcg_constant_internal with constant folding tcg/tci: Add special tci_movi_{i32,i64} opcodes tcg: Remove movi and dupi opcodes tcg: Use tcg_out_dupi_vec from temp_load tcg: Increase tcg_out_dupi_vec immediate to int64_t tcg: Add tcg_reg_alloc_dup2 tcg/i386: Use tcg_constant_vec with tcg vec expanders tcg: Remove tcg_gen_dup{8,16,32,64}i_vec tcg: Add load_dest parameter to GVecGen2 tcg: Fix integral argument type to tcg_gen_rot[rl]i_i{32,64} tcg: Implement gvec support for rotate by immediate tcg: Implement gvec support for rotate by vector tcg: Remove expansion to shift by vector from do_shifts tcg: Implement gvec support for rotate by scalar tcg/i386: Implement INDEX_op_rotl[is]_vec tcg/aarch64: Implement INDEX_op_rotli_vec tcg/ppc: Implement INDEX_op_rot[lr]v_vec target/ppc: Use tcg_gen_gvec_rotlv target/s390x: Use tcg_gen_gvec_rotl{i,s,v} accel/tcg/tcg-runtime.h | 15 ++ include/exec/gen-icount.h | 25 +- include/tcg/tcg-op-gvec.h | 25 +- include/tcg/tcg-op.h | 30 +-- include/tcg/tcg-opc.h | 15 +- include/tcg/tcg.h | 53 +++- target/ppc/helper.h | 4 - target/s390x/helper.h | 4 - tcg/aarch64/tcg-target.h | 3 + tcg/aarch64/tcg-target.opc.h | 1 + tcg/i386/tcg-target.h | 3 + tcg/ppc/tcg-target.h | 3 + tcg/ppc/tcg-target.opc.h | 1 - accel/tcg/plugin-gen.c | 49 ++-- accel/tcg/tcg-runtime-gvec.c | 144 +++++++++++ target/arm/translate-a64.c | 10 +- target/arm/translate-sve.c | 12 +- target/arm/translate.c | 9 +- target/ppc/int_helper.c | 17 -- target/ppc/translate/vmx-impl.inc.c | 40 +-- target/ppc/translate/vsx-impl.inc.c | 2 +- target/s390x/translate_vx.inc.c | 107 ++------ target/s390x/vec_int_helper.c | 31 --- tcg/aarch64/tcg-target.inc.c | 32 ++- tcg/arm/tcg-target.inc.c | 1 - tcg/i386/tcg-target.inc.c | 195 ++++++++++----- tcg/mips/tcg-target.inc.c | 2 - tcg/optimize.c | 204 +++++++-------- tcg/ppc/tcg-target.inc.c | 47 ++-- tcg/riscv/tcg-target.inc.c | 2 - tcg/s390/tcg-target.inc.c | 2 - tcg/sparc/tcg-target.inc.c | 2 - tcg/tcg-op-gvec.c | 374 +++++++++++++++++++++++----- tcg/tcg-op-vec.c | 218 +++++++++++----- tcg/tcg-op.c | 232 ++++++++--------- tcg/tcg.c | 347 ++++++++++++++++++++------ tcg/tci.c | 4 +- tcg/tci/tcg-target.inc.c | 6 +- target/s390x/insn-data.def | 4 +- tcg/README | 7 +- 40 files changed, 1490 insertions(+), 792 deletions(-) -- 2.20.1