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[86.139.146.71]) by smtp.gmail.com with ESMTPSA id n5sm21309350wmi.34.2020.06.28.08.05.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 28 Jun 2020 08:05:17 -0700 (PDT) From: Beata Michalska To: qemu-devel@nongnu.org Subject: [PATCH v8 0/2] target/arm: kvm: Support for KVM DABT with no valid ISS Date: Sun, 28 Jun 2020 16:04:57 +0100 Message-Id: <20200628150459.18566-1-beata.michalska@linaro.org> Received-SPF: pass client-ip=2a00:1450:4864:20::344; envelope-from=beata.michalska@linaro.org; helo=mail-wm1-x344.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, drjones@redhat.com, Christoffer.Dall@arm.com, qemu-arm@nongnu.org, pbonzini@redhat.com, kvmarm@lists.cs.columbia.edu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Some of the ARMv7 & ARMv8 load/store instructions might trigger a data abort exception with no valid ISS info to be decoded. The lack of decode info makes it at least tricky to emulate the instruction which is one of the (many) reasons why KVM will not even try to do so. So far, if a guest made an attempt to access memory outside the memory slot, KVM reported vague ENOSYS. As a result QEMU exited with no useful information being provided or even a clue on what has just happened. ARM KVM introduced support for notifying of an attempt to execute an instruction that resulted in dabt with no valid ISS decoding info. This still leaves QEMU to handle the case, but at least now it gives more control and a start point for more meaningful handling of such cases. This patchset relies on KVM to insert the external data abort into the guest. ---------------------- v8: - moving the comment re support for VCPU events - missed in previous patchset v7: - Rephrasing the comment regarding abort injection and vcpu synchronization - switching to struct initialization instead of memset v6: - replacing calling kvm_put_vcpu_events with an actual ioctl call - making the handler function static v5: - Drop syncing vcpu regs in favour of calling kvm_put_vcpu_events directly - Fix decoding DFSC for LPAE case - Add/clarify comments - Switch to reporting error case failure when enabling the cap v4: - Removing one of the patches as it is being picked-up separately target/arm: kvm: Inject events at the last stage of sync - Moving handling KVM issue to a separate patch - Minor changes wrt the review comments v3: - Fix setting KVM cap per vm not per vcpu - Simplifying the handler to bare minimum with no default logging to address the potential risk of overflooding the host (adding support for rate limiting the logs turned out to be bit too invasive to justify the little add-on value from logs in this particular case) - Adding handling KVM bug (for small range of affected kernels): little bit of trade-off between what's reasonable and what's effective: aborting qemu when running on buggy host kernel v2: - Improving/re-phrasing messaging - Dropping messing around with forced sync (@see [PATCH v2 1/2]) and PC alignment Beata Michalska (2): target/arm: kvm: Handle DABT with no valid ISS target/arm: kvm: Handle misconfigured dabt injection target/arm/cpu.h | 2 ++ target/arm/kvm.c | 85 +++++++++++++++++++++++++++++++++++++++++++++++++++- target/arm/kvm32.c | 34 +++++++++++++++++++++ target/arm/kvm64.c | 49 ++++++++++++++++++++++++++++++ target/arm/kvm_arm.h | 10 +++++++ 5 files changed, 179 insertions(+), 1 deletion(-) -- 2.7.4