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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id t23sm463892wmj.31.2021.05.10.12.08.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 May 2021 12:08:47 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 0/6] hw/arm: Fix modelling of SSE-300 TCMs and SRAM Date: Mon, 10 May 2021 20:08:38 +0100 Message-Id: <20210510190844.17799-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kumar Gala , Jimmy Brisson , Kevin Townsend , Devaraj Ranganna Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This patchset fixes some bugs in how we were modelling the TCMs and the SRAM in the SSE-300 which were preventing Arm TF-M from booting on our AN547 model; there are also some fixes to things I noticed while I was in the code. The specific bugs preventing boot were: * SRAM_ADDR_WIDTH for the AN547 is 21, not 15, so the SRAM area was too small * we were putting the SRAMs at the wrong address (0x2100_0000 for SSE-300, not 0x2000_0000 as for SSE-200) The other stuff I've fixed is: * we were modelling the SRAM in the AN524 both in the SSE and in the board model (harmlessly, as the board-model memory was just always shadowed in the memory map and unreachable) * we were modelling the TCMs in the AN547 board model, which is conceptually wrong because in hardware they're part of the SSE-300. No guest-visible change, but it will avoid problems if/when we add another SSE-300 board model thanks -- PMM Peter Maydell (6): hw/arm/mps2-tz: Don't duplicate modelling of SRAM in AN524 hw/arm/mps2-tz: Make SRAM_ADDR_WIDTH board-specific hw/arm/armsse.c: Correct modelling of SSE-300 internal SRAMs hw/arm/armsse: Convert armsse_realize() to use ERRP_GUARD hw/arm/mps2-tz: Allow board to specify a boot RAM size hw/arm: Model TCMs in the SSE-300, not the AN547 include/hw/arm/armsse.h | 2 ++ hw/arm/armsse.c | 35 +++++++++++++++++++++++++++++------ hw/arm/mps2-tz.c | 39 ++++++++++++++++++++------------------- 3 files changed, 51 insertions(+), 25 deletions(-) -- 2.20.1