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[204.210.126.223]) by smtp.gmail.com with ESMTPSA id w3sm706028pjq.12.2021.07.21.12.59.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 12:59:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 00/27] tcg patch queue for rc0 Date: Wed, 21 Jul 2021 09:59:27 -1000 Message-Id: <20210721195954.879535-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The following changes since commit e77c8b8b8e933414ef07dbed04e02973fccffeb0: Update version for v6.1.0-rc0 release (2021-07-21 17:10:15 +0100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210721 for you to fetch changes up to c2ffd7549b14373e9ca68eccd84fab141ffde646: accel/tcg: Record singlestep_enabled in tb->cflags (2021-07-21 07:47:05 -1000) ---------------------------------------------------------------- Atomic build fixes for clang-12 Breakpoint reorg ---------------------------------------------------------------- Richard Henderson (27): qemu/atomic: Use macros for CONFIG_ATOMIC64 qemu/atomic: Remove pre-C11 atomic fallbacks qemu/atomic: Add aligned_{int64,uint64}_t types tcg: Rename helper_atomic_*_mmu and provide for user-only accel/tcg: Standardize atomic helpers on softmmu api accel/tcg: Fold EXTRA_ARGS into atomic_template.h accel/tcg: Remove ATOMIC_MMU_DECLS accel/tcg: Expand ATOMIC_MMU_LOOKUP_* trace: Fold mem-internal.h into mem.h accel/tcg: Push trace info building into atomic_common.c.inc accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS accel/tcg: Move curr_cflags into cpu-exec.c target/alpha: Drop goto_tb path in gen_call_pal accel/tcg: Add CF_NO_GOTO_TB and CF_NO_GOTO_PTR accel/tcg: Drop CF_NO_GOTO_PTR from -d nochain accel/tcg: Handle -singlestep in curr_cflags accel/tcg: Use CF_NO_GOTO_{TB, PTR} in cpu_exec_step_atomic hw/core: Introduce TCGCPUOps.debug_check_breakpoint target/arm: Implement debug_check_breakpoint target/i386: Implement debug_check_breakpoint hw/core: Introduce CPUClass.gdb_adjust_breakpoint target/avr: Implement gdb_adjust_breakpoint accel/tcg: Merge tb_find into its only caller accel/tcg: Move breakpoint recognition outside translation accel/tcg: Remove TranslatorOps.breakpoint_check accel/tcg: Hoist tb_cflags to a local in translator_loop accel/tcg: Record singlestep_enabled in tb->cflags configure | 7 -- accel/tcg/atomic_template.h | 141 +++++++++++------------- accel/tcg/tcg-runtime.h | 46 -------- include/exec/exec-all.h | 24 ++-- include/exec/translator.h | 11 -- include/hw/core/cpu.h | 4 + include/hw/core/tcg-cpu-ops.h | 6 + include/qemu/atomic.h | 247 ++++++------------------------------------ include/qemu/stats64.h | 2 +- include/tcg/tcg.h | 78 ++++++------- softmmu/timers-state.h | 2 +- target/arm/helper.h | 2 - target/arm/internals.h | 3 + target/avr/cpu.h | 1 + trace/mem-internal.h | 50 --------- trace/mem.h | 50 +++++++-- accel/tcg/cpu-exec.c | 205 +++++++++++++++++++++++++++-------- accel/tcg/cputlb.c | 49 +-------- accel/tcg/translate-all.c | 7 +- accel/tcg/translator.c | 39 ++----- accel/tcg/user-exec.c | 41 +++---- cpu.c | 34 ++---- linux-user/hppa/cpu_loop.c | 2 +- plugins/core.c | 2 +- target/alpha/translate.c | 31 +----- target/arm/cpu.c | 1 + target/arm/cpu_tcg.c | 1 + target/arm/debug_helper.c | 12 +- target/arm/helper-a64.c | 8 +- target/arm/translate-a64.c | 25 ----- target/arm/translate.c | 29 ----- target/avr/cpu.c | 1 + target/avr/gdbstub.c | 13 +++ target/avr/translate.c | 32 ------ target/cris/translate.c | 20 ---- target/hexagon/translate.c | 17 --- target/hppa/translate.c | 11 -- target/i386/tcg/mem_helper.c | 15 +-- target/i386/tcg/tcg-cpu.c | 12 ++ target/i386/tcg/translate.c | 28 ----- target/m68k/op_helper.c | 19 +--- target/m68k/translate.c | 18 --- target/microblaze/translate.c | 18 --- target/mips/tcg/translate.c | 19 ---- target/nios2/translate.c | 27 ----- target/openrisc/translate.c | 17 --- target/ppc/mem_helper.c | 16 +-- target/ppc/translate.c | 18 --- target/riscv/translate.c | 17 --- target/rx/translate.c | 14 --- target/s390x/tcg/mem_helper.c | 19 ++-- target/s390x/tcg/translate.c | 24 ---- target/sh4/translate.c | 18 --- target/sparc/translate.c | 17 --- target/tricore/translate.c | 16 --- target/xtensa/translate.c | 17 --- tcg/tcg-op.c | 79 ++++---------- util/qsp.c | 4 +- accel/tcg/atomic_common.c.inc | 107 ++++++++++++++++-- 59 files changed, 577 insertions(+), 1216 deletions(-) delete mode 100644 trace/mem-internal.h