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[173.197.98.118]) by smtp.gmail.com with ESMTPSA id t4-20020a17090ad14400b00219220edf0dsm7451215pjw.48.2023.01.30.13.48.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 13:48:47 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: alex.bennee@linaro.org, philmd@linaro.org Subject: [PATCH v6 00/36] tcg: Support for Int128 with helpers Date: Mon, 30 Jan 2023 11:48:08 -1000 Message-Id: <20230130214844.1158612-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Branch: https://gitlab.com/rth7680/qemu/-/tree/tcg-i128 Based-on: 20230124020507.3732200-1-richard.henderson@linaro.org ("[PULL v2 00/15] tcg patch queue") Changes for v6: * R-b applied. Patches lacking review: 05-tcg-Add-TCG_CALL_-RET-ARG-_BY_REF.patch 15-tcg-Add-guest-load-store-primitives-for-TCGv_i128.patch 17-tcg-Split-out-tcg_gen_nonatomic_cmpxchg_i-32-64.patch 32-target-s390x-Use-tcg_gen_atomic_cmpxchg_i128-for-.patch 35-target-i386-Inline-cmpxchg8b.patch 36-target-i386-Inline-cmpxchg16b.patch r~ Ilya Leoshkevich (2): tests/tcg/s390x: Add div.c tests/tcg/s390x: Add clst.c Richard Henderson (34): tcg: Define TCG_TYPE_I128 and related helper macros tcg: Handle dh_typecode_i128 with TCG_CALL_{RET,ARG}_NORMAL tcg: Allocate objects contiguously in temp_allocate_frame tcg: Introduce tcg_out_addi_ptr tcg: Add TCG_CALL_{RET,ARG}_BY_REF tcg: Introduce tcg_target_call_oarg_reg tcg: Add TCG_CALL_RET_BY_VEC include/qemu/int128: Use Int128 structure for TCI tcg/i386: Add TCG_TARGET_CALL_{RET,ARG}_I128 tcg/tci: Fix big-endian return register ordering tcg/tci: Add TCG_TARGET_CALL_{RET,ARG}_I128 tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128 tcg: Add temp allocation for TCGv_i128 tcg: Add basic data movement for TCGv_i128 tcg: Add guest load/store primitives for TCGv_i128 tcg: Add tcg_gen_{non}atomic_cmpxchg_i128 tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32,64} target/arm: Use tcg_gen_atomic_cmpxchg_i128 for STXP target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASP target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCX tests/tcg/s390x: Add long-double.c target/s390x: Use a single return for helper_divs32/u32 target/s390x: Use a single return for helper_divs64/u64 target/s390x: Use Int128 for return from CLST target/s390x: Use Int128 for return from CKSM target/s390x: Use Int128 for return from TRE target/s390x: Copy wout_x1 to wout_x1_P target/s390x: Use Int128 for returning float128 target/s390x: Use Int128 for passing float128 target/s390x: Use tcg_gen_atomic_cmpxchg_i128 for CDSG target/s390x: Implement CC_OP_NZ in gen_op_calc_cc target/i386: Split out gen_cmpxchg8b, gen_cmpxchg16b target/i386: Inline cmpxchg8b target/i386: Inline cmpxchg16b accel/tcg/tcg-runtime.h | 11 + include/exec/cpu_ldst.h | 10 + include/exec/helper-head.h | 7 + include/qemu/atomic128.h | 29 ++- include/qemu/int128.h | 25 +- include/tcg/tcg-op.h | 15 ++ include/tcg/tcg.h | 49 +++- target/arm/helper-a64.h | 8 - target/i386/helper.h | 6 - target/ppc/helper.h | 2 - target/s390x/helper.h | 54 ++--- tcg/aarch64/tcg-target.h | 2 + tcg/arm/tcg-target.h | 2 + tcg/i386/tcg-target.h | 10 + tcg/loongarch64/tcg-target.h | 2 + tcg/mips/tcg-target.h | 2 + tcg/riscv/tcg-target.h | 3 + tcg/s390x/tcg-target.h | 2 + tcg/sparc64/tcg-target.h | 2 + tcg/tcg-internal.h | 17 ++ tcg/tci/tcg-target.h | 3 + target/s390x/tcg/insn-data.h.inc | 60 ++--- accel/tcg/cputlb.c | 112 +++++++++ accel/tcg/user-exec.c | 66 ++++++ target/arm/helper-a64.c | 147 ------------ target/arm/translate-a64.c | 121 +++++----- target/i386/tcg/mem_helper.c | 126 ---------- target/i386/tcg/translate.c | 126 ++++++++-- target/ppc/mem_helper.c | 44 ---- target/ppc/translate.c | 102 ++++---- target/s390x/tcg/fpu_helper.c | 103 ++++---- target/s390x/tcg/int_helper.c | 64 ++--- target/s390x/tcg/mem_helper.c | 77 +----- target/s390x/tcg/translate.c | 212 +++++++++++------ tcg/tcg-op.c | 393 ++++++++++++++++++++++++++----- tcg/tcg.c | 307 +++++++++++++++++++++--- tcg/tci.c | 65 ++--- tests/tcg/s390x/clst.c | 82 +++++++ tests/tcg/s390x/div.c | 75 ++++++ tests/tcg/s390x/long-double.c | 24 ++ util/int128.c | 42 ++++ accel/tcg/atomic_common.c.inc | 45 ++++ tcg/aarch64/tcg-target.c.inc | 17 +- tcg/arm/tcg-target.c.inc | 30 ++- tcg/i386/tcg-target.c.inc | 52 +++- tcg/loongarch64/tcg-target.c.inc | 17 +- tcg/mips/tcg-target.c.inc | 17 +- tcg/ppc/tcg-target.c.inc | 20 +- tcg/riscv/tcg-target.c.inc | 17 +- tcg/s390x/tcg-target.c.inc | 16 +- tcg/sparc64/tcg-target.c.inc | 19 +- tcg/tci/tcg-target.c.inc | 27 ++- tests/tcg/s390x/Makefile.target | 3 + 53 files changed, 1935 insertions(+), 954 deletions(-) create mode 100644 tests/tcg/s390x/clst.c create mode 100644 tests/tcg/s390x/div.c create mode 100644 tests/tcg/s390x/long-double.c