[v4,00/16] tcg: Improvements to atomic128

Message ID	20230526002334.1760495-1-richard.henderson@linaro.org
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Series	tcg: Improvements to atomic128 \| expand [v4,00/16] tcg: Improvements to atomic128 [v4,01/16] tcg: Fix register move type in tcg_out_ld_helper_ret [v4,02/16] accel/tcg: Fix check for page writeability in load_atomic16_or_exit [v4,03/16] meson: Split test for __int128_t type from __int128_t arithmetic [v4,04/16] qemu/atomic128: Add x86_64 atomic128-ldst.h [v4,05/16] tcg/i386: Support 128-bit load/store [v4,06/16] tcg/aarch64: Rename temporaries [v4,07/16] tcg/aarch64: Reserve TCG_REG_TMP1, TCG_REG_TMP2 [v4,08/16] tcg/aarch64: Simplify constraints on qemu_ld/st [v4,09/16] tcg/aarch64: Support 128-bit load/store [v4,10/16] tcg/ppc: Support 128-bit load/store [v4,11/16] tcg/s390x: Support 128-bit load/store [v4,12/16] accel/tcg: Extract load_atom_extract_al16_or_al8 to host header [v4,13/16] accel/tcg: Extract store_atom_insert_al16 to host header [v4,14/16] accel/tcg: Add x86_64 load_atom_extract_al16_or_al8 [v4,15/16] accel/tcg: Add aarch64 lse2 load_atom_extract_al16_or_al8 [v4,16/16] accel/tcg: Add aarch64 store_atom_insert_al16

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20230526002334.1760495-1-richard.henderson@linaro.org

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Cc: qemu-arm@nongnu.org
Subject: [PATCH v4 00/16] tcg: Improvements to atomic128
Date: Thu, 25 May 2023 17:23:18 -0700
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Series

tcg: Improvements to atomic128 | expand

Message

Richard Henderson May 26, 2023, 12:23 a.m. UTC

This is a merge of a couple of singleton fixes, CONFIG_ATOMIC128
detection, and tcg backend code generation patch sets, just to
keep everything in one place.

Tested with the Arm FEAT_LSE2 patch set, which greatly increases
the number of 16-byte atomic operations.

Patches needing review:
  01-tcg-Fix-register-move-type-in-tcg_out_ld_helper_r.patch
  02-accel-tcg-Fix-check-for-page-writeability-in-load.patch
  03-meson-Split-test-for-__int128_t-type-from-__int12.patch
  05-tcg-i386-Support-128-bit-load-store.patch
  07-tcg-aarch64-Reserve-TCG_REG_TMP1-TCG_REG_TMP2.patch
  08-tcg-aarch64-Simplify-constraints-on-qemu_ld-st.patch
  12-accel-tcg-Extract-load_atom_extract_al16_or_al8-t.patch
  13-accel-tcg-Extract-store_atom_insert_al16-to-host-.patch
  14-accel-tcg-Add-x86_64-load_atom_extract_al16_or_al.patch
  15-accel-tcg-Add-aarch64-lse2-load_atom_extract_al16.patch
  16-accel-tcg-Add-aarch64-store_atom_insert_al16.patch


r~


Richard Henderson (16):
  tcg: Fix register move type in tcg_out_ld_helper_ret
  accel/tcg: Fix check for page writeability in load_atomic16_or_exit
  meson: Split test for __int128_t type from __int128_t arithmetic
  qemu/atomic128: Add x86_64 atomic128-ldst.h
  tcg/i386: Support 128-bit load/store
  tcg/aarch64: Rename temporaries
  tcg/aarch64: Reserve TCG_REG_TMP1, TCG_REG_TMP2
  tcg/aarch64: Simplify constraints on qemu_ld/st
  tcg/aarch64: Support 128-bit load/store
  tcg/ppc: Support 128-bit load/store
  tcg/s390x: Support 128-bit load/store
  accel/tcg: Extract load_atom_extract_al16_or_al8 to host header
  accel/tcg: Extract store_atom_insert_al16 to host header
  accel/tcg: Add x86_64 load_atom_extract_al16_or_al8
  accel/tcg: Add aarch64 lse2 load_atom_extract_al16_or_al8
  accel/tcg: Add aarch64 store_atom_insert_al16

 meson.build                                   |  15 +-
 .../aarch64/host/load-extract-al16-al8.h      |  40 +++
 host/include/aarch64/host/store-insert-al16.h |  47 ++++
 .../generic/host/load-extract-al16-al8.h      |  45 ++++
 host/include/generic/host/store-insert-al16.h |  50 ++++
 host/include/x86_64/host/atomic128-ldst.h     |  68 +++++
 .../x86_64/host/load-extract-al16-al8.h       |  50 ++++
 include/qemu/int128.h                         |   4 +-
 tcg/aarch64/tcg-target-con-set.h              |   4 +-
 tcg/aarch64/tcg-target-con-str.h              |   1 -
 tcg/aarch64/tcg-target.h                      |  11 +-
 tcg/i386/tcg-target.h                         |   4 +-
 tcg/ppc/tcg-target-con-set.h                  |   2 +
 tcg/ppc/tcg-target-con-str.h                  |   1 +
 tcg/ppc/tcg-target.h                          |   3 +-
 tcg/s390x/tcg-target-con-set.h                |   2 +
 tcg/s390x/tcg-target.h                        |   2 +-
 tcg/tcg.c                                     |   4 +-
 accel/tcg/ldst_atomicity.c.inc                |  78 +-----
 tcg/aarch64/tcg-target.c.inc                  | 243 ++++++++++++++----
 tcg/i386/tcg-target.c.inc                     | 191 +++++++++++++-
 tcg/ppc/tcg-target.c.inc                      | 108 +++++++-
 tcg/s390x/tcg-target.c.inc                    | 103 +++++++-
 23 files changed, 913 insertions(+), 163 deletions(-)
 create mode 100644 host/include/aarch64/host/load-extract-al16-al8.h
 create mode 100644 host/include/aarch64/host/store-insert-al16.h
 create mode 100644 host/include/generic/host/load-extract-al16-al8.h
 create mode 100644 host/include/generic/host/store-insert-al16.h
 create mode 100644 host/include/x86_64/host/atomic128-ldst.h
 create mode 100644 host/include/x86_64/host/load-extract-al16-al8.h