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[176.184.43.236]) by smtp.gmail.com with ESMTPSA id q14-20020adfcd8e000000b003368c8d120fsm5565422wrj.7.2024.01.10.11.53.31 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 10 Jan 2024 11:53:33 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Marcin Juszkiewicz , qemu-arm@nongnu.org, Kevin Wolf , Igor Mitsyanko , =?utf-8?q?Alex_Benn=C3=A9e?= , Radoslaw Biernacki , "Edgar E. Iglesias" , Leif Lindholm , Rob Herring , Markus Armbruster , Alistair Francis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v3 00/14] hw/arm: Prefer arm_feature() over object_property_find() Date: Wed, 10 Jan 2024 20:53:14 +0100 Message-ID: <20240110195329.3995-1-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since v2 [2]: - Dropped "Simplify checking A64_MTE bit in FEATURE_ID register" - Correct object_property_get_bool() uses - Update ARM_FEATURE_AARCH64 && aa64_mte Since RFC [1]: - Split one patch per feature - Addressed Peter's review comments [1] https://lore.kernel.org/qemu-devel/20231214171447.44025-1-philmd@linaro.org/ [2] https://lore.kernel.org/qemu-devel/20240109180930.90793-1-philmd@linaro.org/ Based-on: <20231123143813.42632-1-philmd@linaro.org> "hw: Simplify accesses to CPUState::'start-powered-off' property" Philippe Mathieu-Daudé (14): hw/arm/armv7m: Introduce cpudev variable in armv7m_realize() hw/arm/armv7m: Ensure requested CPU type implements ARM_FEATURE_M hw/arm/armv7m: Move code setting 'start-powered-off' property around hw/arm/armv7m: Always set 'init-nsvtor' property for Cortex-M CPUs hw/arm: Prefer arm_feature(M_SECURITY) over object_property_find() hw/arm: Prefer arm_feature(THUMB_DSP) over object_property_find(dsp) hw/arm: Prefer arm_feature(V7) over object_property_find(pmsav7-dregion) hw/arm: Prefer arm_feature(EL3) over object_property_find(has_el3) hw/arm: Prefer arm_feature(EL2) over object_property_find(has_el2) hw/arm: Prefer arm_feature(CBAR*) over object_property_find(reset-cbar) hw/arm: Prefer arm_feature(PMU) over object_property_find(pmu) hw/arm: Prefer arm_feature(GENERIC_TMR) over 'kvm-no-adjvtime' property hw/arm: Prefer arm_feature(AARCH64) over object_property_find(aarch64) hw/arm: Prefer cpu_isar_feature(aa64_mte) over property_find(tag-memory) hw/arm/armv7m.c | 36 ++++++++++++++++-------------------- hw/arm/exynos4210.c | 4 ++-- hw/arm/highbank.c | 3 ++- hw/arm/integratorcp.c | 5 ++--- hw/arm/realview.c | 2 +- hw/arm/sbsa-ref.c | 3 ++- hw/arm/versatilepb.c | 5 ++--- hw/arm/vexpress.c | 6 ++++-- hw/arm/virt.c | 26 +++++++++++++------------- hw/arm/xilinx_zynq.c | 2 +- hw/cpu/a15mpcore.c | 23 +++++++++++++++-------- hw/cpu/a9mpcore.c | 9 +++++---- 12 files changed, 65 insertions(+), 59 deletions(-)