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[95.127.63.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45364703f1esm31662015e9.32.2025.06.20.10.27.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 20 Jun 2025 10:27:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alexander Graf , =?utf-8?q?Alex_Benn=C3=A9e?= , Richard Henderson , Paolo Bonzini , Peter Maydell , Julian Armistead , Cameron Esfahani , Mark Burton , Thomas Huth , "Edgar E. Iglesias" , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [RFC PATCH RESEND 00/42] accel/split/arm: Run EL2 using TCG and EL1/EL0 in hardware with HVF Date: Fri, 20 Jun 2025 19:27:08 +0200 Message-ID: <20250620172751.94231-1-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Hi, This RFC is a proof-of-concept we can have QEMU run both software emulator (TCG) and hardware accelerator (here HVF). Unfortunately I'm exhausted so I'll let Alex explain what this is about, otherwise I'll post the real cover letter next Monday after getting some rest. Full work available in the split-accel-rfc-v5 tag: https://gitlab.com/philmd/qemu/-/commits/split-accel-rfc-v5 Regards, Phil. Julian Armistead (1): accel/split: Minimal stubs for split accelerator Philippe Mathieu-Daudé (41): accel/split: Define SplitAccelState accel/split: Implement cpus_are_resettable() accel/split: Implement accel_init_machine() accel/split: Expose 'hw' and 'sw' properties accel/split: Empty setup_post() accel/split: Implement supports_guest_debug() accel/split: Implement gdbstub_supported_sstep_flags() accel/split: Add cpu_thread_routine() stub accel/split: Define and allocate AccelCPUState accel/split: Register MTTCG accel/split: Have thread routine ready to dispatch over HW/SW accel/split: Implement cpu_reset_hold() accel/split: Implement synchronize_post_init() accel/split: Implement synchronize_pre_resume() accel/split: Implement synchronize_state() accel/split: Implement synchronize_post_reset() accel/split: Implement synchronize_pre_loadvm() accel/split: Implement kick_vcpu_thread() accel/split: Implement cpu_common_realize() accel/split: Set use_hw in cpu_thread_routine() and switch over accel/split: Add few trace events in cpu_thread_routine handler target/arm: Implement SysemuCPUOps::can_accelerate() handler accel/split: Implement handle_interrupt() accel/split: Empty ops_init() accel/split: Empty set/get_virtual_clock() accel/split: Empty get_elapsed_ticks() accel/split: Empty cpu_thread_is_idle() accel/split: Kludge qemu_tcg_mttcg_enabled() accel/split: Implement remove_all_breakpoints() accel/split: Implement remove_breakpoint() accel/split: Implement insert_breakpoint() accel/split: Implement update_guest_debug() accel/split: Implement get_[vcpu]_stats() target/arm: Emulate EL2 under TCG target/arm: Have ERET switch to hw accel for EL0/EL1 accel/hvf: Emulate HVC at EL2 accel/tcg: Introduce TCGCPUOps::rebuild_tb_hflags handler target/arm: Implement TCGCPUOps::rebuild_tb_hflags() accel/split: Call TCGCPUOps::rebuild_tb_hflags() tests/functional: Add split_available() helper tests/functional: Test Aarch64 virt machine with split-accelerator meson.build | 1 + accel/split/split-accel.h | 54 +++ accel/split/trace.h | 2 + accel/tcg/internal-common.h | 1 + include/accel/tcg/cpu-ops.h | 2 + include/exec/cpu-common.h | 1 + include/system/accel-ops.h | 8 + target/arm/cpu.h | 2 + accel/split/split-accel-ops.c | 381 ++++++++++++++++++++ accel/split/split-all.c | 196 ++++++++++ accel/tcg/cpu-exec.c | 9 + accel/tcg/tcg-accel-ops.c | 1 + accel/tcg/tcg-all.c | 1 + system/vl.c | 4 + target/arm/cpu.c | 9 + target/arm/cpu64.c | 7 +- target/arm/hvf/hvf.c | 6 + target/arm/tcg/cpu-v7m.c | 1 + target/arm/tcg/helper-a64.c | 9 + target/arm/tcg/hflags.c | 5 + accel/Kconfig | 6 + accel/meson.build | 1 + accel/split/meson.build | 9 + accel/split/trace-events | 9 + python/qemu/utils/__init__.py | 3 +- python/qemu/utils/accel.py | 10 + tests/functional/meson.build | 1 + tests/functional/qemu_test/testcase.py | 4 +- tests/functional/test_aarch64_virt_split.py | 69 ++++ 29 files changed, 808 insertions(+), 4 deletions(-) create mode 100644 accel/split/split-accel.h create mode 100644 accel/split/trace.h create mode 100644 accel/split/split-accel-ops.c create mode 100644 accel/split/split-all.c create mode 100644 accel/split/meson.build create mode 100644 accel/split/trace-events create mode 100644 tests/functional/test_aarch64_virt_split.py