Show patches with: Submitter = Richard Henderson       |   22802 patches
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Patch Series S/W/F Date Submitter Delegate State
[v2,33/67] target/arm: Convert SMAXP, SMINP, UMAXP, UMINP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,32/67] target/arm: Use gvec for neon padd target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,31/67] target/arm: Convert ADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,30/67] target/arm: Use gvec for neon faddp, fmaxp, fminp target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,29/67] target/arm: Convert FMAXP, FMINP, FMAXNMP, FMINNMP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,28/67] target/arm: Convert FADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,27/67] target/arm: Convert FRECPS, FRSQRTS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,26/67] target/arm: Convert FABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,25/67] target/arm: Convert FCMEQ, FCMGE, FCMGT, FACGE, FACGT to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,24/67] target/arm: Convert FMLA, FMLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,23/67] target/arm: Convert FNMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,22/67] target/arm: Expand vfp neg and abs inline target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,21/67] target/arm: Introduce vfp_load_reg16 target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,20/67] target/arm: Convert FMAX, FMIN, FMAXNM, FMINNM to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,19/67] target/arm: Convert FADD, FSUB, FDIV, FMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,18/67] target/arm: Convert FMULX to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,17/67] target/arm: Convert Advanced SIMD copy to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,16/67] target/arm: Convert XAR to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,15/67] target/arm: Convert Cryptographic 3-register, imm2 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,14/67] target/arm: Convert Cryptographic 4-register to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,13/67] target/arm: Convert Cryptographic 2-register SHA512 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,12/67] target/arm: Convert Cryptographic 3-register SHA512 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,11/67] target/arm: Convert Cryptographic 2-register SHA to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,10/67] target/arm: Convert Cryptographic 3-register SHA to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,09/67] target/arm: Convert Cryptographic AES to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,08/67] target/arm: Split out gengvec64.c target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,07/67] target/arm: Split out gengvec.c target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,06/67] target/arm: Verify sz=0 for Advanced SIMD scalar pairwise (fp16) target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,05/67] target/arm: Fix decode of FMOV (hp) vs MOVI target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,04/67] target/arm: Zero-extend writeback for fp16 FCVTZS (scalar, integer) target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,03/67] target/arm: Reject incorrect operands to PLD, PLDW, PLI target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,02/67] target/arm: Use PLD, PLDW, PLI not NOP for t32 target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,01/67] target/arm: Add neoverse-n1 to qemu-arm (DO NOT MERGE) target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[PULL,5/5] accel/tcg: Init tb size and icount before plugin_gen_tb_end [PULL,1/5] tcg: Introduce TCG_TARGET_HAS_tst_vec --- 2024-05-23 Richard Henderson Accepted
[PULL,4/5] tcg/arm: Support TCG_TARGET_HAS_tst_vec [PULL,1/5] tcg: Introduce TCG_TARGET_HAS_tst_vec --- 2024-05-23 Richard Henderson New
[PULL,3/5] tcg/aarch64: Support TCG_TARGET_HAS_tst_vec [PULL,1/5] tcg: Introduce TCG_TARGET_HAS_tst_vec --- 2024-05-23 Richard Henderson New
[PULL,2/5] tcg: Expand TCG_COND_TST* if not TCG_TARGET_HAS_tst_vec [PULL,1/5] tcg: Introduce TCG_TARGET_HAS_tst_vec --- 2024-05-23 Richard Henderson Accepted
[PULL,1/5] tcg: Introduce TCG_TARGET_HAS_tst_vec [PULL,1/5] tcg: Introduce TCG_TARGET_HAS_tst_vec --- 2024-05-23 Richard Henderson Accepted
[PULL,0/5] tcg patch queue --- 2024-05-23 Richard Henderson New
[RISU,4/4] contrib/generate_all: Do not rely on ag risugen/arm: Convert to use assembly --- 2024-05-22 Richard Henderson Superseded
[RISU,3/4] risugen/arm: Switch to thumb mode only once risugen/arm: Convert to use assembly --- 2024-05-22 Richard Henderson New
[RISU,2/4] risugen/arm: Fill general regs with 64-bit random data risugen/arm: Convert to use assembly --- 2024-05-22 Richard Henderson New
[RISU,1/4] risugen/arm: Convert to use assembly risugen/arm: Convert to use assembly --- 2024-05-22 Richard Henderson New
[RISU,v2,8/8] sparc64: Add VIS1 instructions ELF and Sparc64 support --- 2024-05-22 Richard Henderson Superseded
[RISU,v2,7/8] sparc64: Add a few logical insns ELF and Sparc64 support --- 2024-05-22 Richard Henderson Superseded
[RISU,v2,6/8] risugen: Add sparc64 support ELF and Sparc64 support --- 2024-05-22 Richard Henderson Superseded
[RISU,v2,5/8] risugen: Be explicit about print destinations ELF and Sparc64 support --- 2024-05-22 Richard Henderson Superseded
[RISU,v2,4/8] risu: Add initial sparc64 support ELF and Sparc64 support --- 2024-05-22 Richard Henderson Superseded
[RISU,v2,3/8] Introduce host_context_t ELF and Sparc64 support --- 2024-05-22 Richard Henderson Superseded
[RISU,v2,2/8] Build elf test cases instead of raw binaries ELF and Sparc64 support --- 2024-05-22 Richard Henderson Superseded
[RISU,v2,1/8] risu: Allow use of ELF test files ELF and Sparc64 support --- 2024-05-22 Richard Henderson Superseded
accel/tcg: Init tb size and icount before plugin_gen_tb_end accel/tcg: Init tb size and icount before plugin_gen_tb_end --- 2024-05-21 Richard Henderson Superseded
[v3,28/28] target/i386: Pass host pointer and size to cpu_x86_{xsave, xrstor} linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,27/28] target/i386: Pass host pointer and size to cpu_x86_{fxsave, fxrstor} linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,26/28] target/i386: Pass host pointer and size to cpu_x86_{fsave, frstor} linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,25/28] target/i386: Convert do_xrstor to X86Access linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,24/28] target/i386: Convert do_xsave to X86Access linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,23/28] target/i386: Honor xfeatures in xrstor_sigcontext linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,22/28] linux-user/i386: Fix allocation and alignment of fp state linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,21/28] linux-user/i386: Return boolean success from xrstor_sigcontext linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,20/28] linux-user/i386: Return boolean success from restore_sigcontext linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,19/28] linux-user/i386: Fix -mregparm=3 for signal delivery linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,18/28] linux-user/i386: Split out struct target_fregs_state linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,17/28] linux-user/i386: Replace target_fpstate_fxsave with X86LegacyXSaveArea linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,16/28] linux-user/i386: Remove xfeatures from target_fpstate_fxsave linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,15/28] linux-user/i386: Drop xfeatures_size from sigcontext arithmetic linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,14/28] target/i386: Add {hw, sw}_reserved to X86LegacyXSaveArea linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,13/28] target/i386: Add rbfm argument to cpu_x86_{xsave, xrstor} linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,12/28] target/i386: Split out do_xsave_chk linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,11/28] target/i386: Convert do_xrstor_* to X86Access linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,10/28] target/i386: Convert do_xsave_* to X86Access linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,09/28] tagret/i386: Convert do_fxsave, do_fxrstor to X86Access linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,08/28] target/i386: Convert do_xrstor_{fpu, mxcr, sse} to X86Access linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,07/28] target/i386: Convert do_xsave_{fpu, mxcr, sse} to X86Access linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,06/28] target/i386: Convert do_fsave, do_frstor to X86Access linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,05/28] target/i386: Convert do_fstenv to X86Access linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,04/28] target/i386: Convert do_fldenv to X86Access linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,03/28] target/i386: Convert helper_{fbld, fbst}_ST0 to X86Access linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,02/28] target/i386: Convert do_fldt, do_fstt to X86Access linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[v3,01/28] target/i386: Add tcg/access.[ch] linux-user/i386: Properly align signal frame --- 2024-05-15 Richard Henderson Superseded
[5/5] target/arm: Use TCG_COND_TSTNE in gen_cmtst_vec tcg: Support TCG_COND_TST* for vectors --- 2024-05-15 Richard Henderson Superseded
[4/5] tcg/arm: Support TCG_TARGET_HAS_tst_vec tcg: Support TCG_COND_TST* for vectors --- 2024-05-15 Richard Henderson Superseded
[3/5] tcg/aarch64: Support TCG_TARGET_HAS_tst_vec tcg: Support TCG_COND_TST* for vectors --- 2024-05-15 Richard Henderson Superseded
[2/5] tcg: Expand TCG_COND_TST* if not TCG_TARGET_HAS_tst_vec tcg: Support TCG_COND_TST* for vectors --- 2024-05-15 Richard Henderson Superseded
[1/5] tcg: Introduce TCG_TARGET_HAS_tst_vec tcg: Support TCG_COND_TST* for vectors --- 2024-05-15 Richard Henderson Superseded
[PULL,43/43] target/hppa: Log cpu state on return-from-interrupt [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson Accepted
[PULL,42/43] target/hppa: Log cpu state at interrupt [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson New
[PULL,41/43] target/hppa: Implement CF_PCREL [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson Accepted
[PULL,40/43] target/hppa: Adjust priv for B,GATE at runtime [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson Accepted
[PULL,39/43] target/hppa: Drop tlb_entry return from hppa_get_physical_address [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson Accepted
[PULL,38/43] target/hppa: Implement PSW_X [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson New
[PULL,37/43] target/hppa: Implement PSW_B [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson Accepted
[PULL,36/43] target/hppa: Manage PSW_X and PSW_B in translator [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson Accepted
[PULL,35/43] target/hppa: Split PSW X and B into their own field [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson Accepted
[PULL,34/43] target/hppa: Improve hppa_cpu_dump_state [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson Accepted
[PULL,33/43] target/hppa: Do not mask in copy_iaoq_entry [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson Accepted
[PULL,32/43] target/hppa: Store full iaoq_f and page offset of iaoq_b in TB [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson New
[PULL,31/43] linux-user/hppa: Force all code addresses to PRIV_USER [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson New
[PULL,30/43] target/hppa: Use delay_excp for conditional trap on overflow [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson Accepted
[PULL,29/43] target/hppa: Use delay_excp for conditional traps [PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line --- 2024-05-15 Richard Henderson Accepted
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