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Patch Series S/W/F Date Submitter Delegate State
[PULL,14/38] display: avoid multi-statement macro --- 2014-01-29 Peter Maydell Accepted
[PULL,13/38] ZYNQ: Implement board MIDR control for Zynq --- 2014-01-29 Peter Maydell Accepted
[PULL,12/38] ARM: Convert MIDR to a property --- 2014-01-29 Peter Maydell Accepted
[PULL,11/38] hw/arm/boot: Don't set up ATAGS for autogenerated dtb booting --- 2014-01-29 Peter Maydell Accepted
[PULL,10/38] target-arm: A64: Add SIMD scalar copy instructions --- 2014-01-29 Peter Maydell Accepted
[PULL,09/38] target-arm: A64: Add SIMD modified immediate group --- 2014-01-29 Peter Maydell Accepted
[PULL,08/38] target-arm: A64: Add SIMD copy operations --- 2014-01-29 Peter Maydell Accepted
[PULL,07/38] target-arm: A64: Add SIMD across-lanes instructions --- 2014-01-29 Peter Maydell Accepted
[PULL,06/38] target-arm: A64: Add SIMD ZIP/UZP/TRN --- 2014-01-29 Peter Maydell Accepted
[PULL,05/38] target-arm: A64: Add SIMD TBL/TBLX --- 2014-01-29 Peter Maydell Accepted
[PULL,04/38] target-arm: A64: Add SIMD EXT --- 2014-01-29 Peter Maydell Accepted
[PULL,03/38] target-arm: A64: Add decode skeleton for SIMD data processing insns --- 2014-01-29 Peter Maydell Accepted
[PULL,02/38] target-arm: A64: Add SIMD ld/st single --- 2014-01-29 Peter Maydell Accepted
[PULL,01/38] target-arm: A64: Add SIMD ld/st multiple --- 2014-01-29 Peter Maydell Accepted
[PULL,00/38] target-arm queue --- 2014-01-29 Peter Maydell Superseded
[BUG] BSoD on Windows XP installation --- 2014-01-29 Stefano Stabellini New
[v3] target-arm: Add support for AArch32 64bit VCVTB and VCVTT --- 2014-01-29 Will Newton Accepted
[v5,8/8] hw: arm_gic_kvm: Add KVM VGIC save/restore logic --- 2014-01-28 Christoffer Dall Superseded
[v5,7/8] arm_gic: Add GICC_APRn state to the GICState --- 2014-01-28 Christoffer Dall Superseded
[v5,6/8] vmstate: Add uint32 2D-array support --- 2014-01-28 Christoffer Dall Superseded
[v5,5/8] arm_gic: Support setting/getting binary point reg --- 2014-01-28 Christoffer Dall Superseded
[v5,4/8] hw: arm_gic: Keep track of SGI sources --- 2014-01-28 Christoffer Dall New
[v5,3/8] arm_gic: Fix GIC pending behavior --- 2014-01-28 Christoffer Dall New
[v5,2/8] arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writes --- 2014-01-28 Christoffer Dall Superseded
[v5,1/8] arm_gic: Introduce define for GIC_NR_SGIS --- 2014-01-28 Christoffer Dall Superseded
[v4,4/4] arm: vgic device control api support --- 2014-01-28 Christoffer Dall Superseded
[v4,3/4] kvm: Common device control API functions --- 2014-01-28 Christoffer Dall Superseded
[v4,2/4] kvm: Introduce kvm_arch_irqchip_create --- 2014-01-28 Christoffer Dall Superseded
[v4,1/4] linux-headers: Update from Linus' master ba635f8 --- 2014-01-28 Christoffer Dall New
[v2,11/11] target-arm: Add support for AArch32 64bit VCVTB and VCVTT --- 2014-01-28 Will Newton Superseded
[v2,10/11] target-arm: Add AArch32 SIMD VCVTA, VCVTN, VCVTP and VCVTM --- 2014-01-28 Will Newton Accepted
[v2,09/11] target-arm: Add AArch32 FP VCVTA, VCVTN, VCVTP and VCVTM --- 2014-01-28 Will Newton Accepted
[v2,08/11] target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZ --- 2014-01-28 Will Newton Accepted
[v2,07/11] target-arm: Add set_neon_rmode helper --- 2014-01-28 Will Newton Accepted
[v2,06/11] target-arm: Add support for AArch32 SIMD VRINTX --- 2014-01-28 Will Newton Accepted
[v2,05/11] target-arm: Add support for AArch32 FP VRINTX --- 2014-01-28 Will Newton Accepted
[v2,04/11] target-arm: Add support for AArch32 FP VRINTZ --- 2014-01-28 Will Newton Accepted
[v2,03/11] target-arm: Add support for AArch32 FP VRINTR --- 2014-01-28 Will Newton Accepted
[v2,02/11] target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTM --- 2014-01-28 Will Newton Accepted
[v2,01/11] target-arm: Move arm_rmode_to_sf to a shared location. --- 2014-01-28 Will Newton Accepted
[PULL,3/4] Fix lan9118 buffer length handling --- 2014-01-27 Stefan Hajnoczi Accepted
[PULL,2/4] Fix lan9118 TX "CMD A" handling --- 2014-01-27 Stefan Hajnoczi Accepted
[21/21] target-arm: A64: Add FNEG and FABS to the SIMD 2-reg-misc group --- 2014-01-26 Peter Maydell Superseded
[20/21] target-arm: A64: Add 2-reg-misc REV* instructions --- 2014-01-26 Peter Maydell Superseded
[19/21] target-arm: A64: Add narrowing 2-reg-misc instructions --- 2014-01-26 Peter Maydell Superseded
[18/21] target-arm: A64: Implement 2-reg-misc CNT, NOT and RBIT --- 2014-01-26 Peter Maydell Superseded
[17/21] target-arm: A64: Implement 2-register misc compares, ABS, NEG --- 2014-01-26 Peter Maydell Superseded
[16/21] target-arm: A64: Add skeleton decode for SIMD 2-reg misc group --- 2014-01-26 Peter Maydell Superseded
[15/21] target-arm: A64: Add SIMD simple 64 bit insns from scalar 2-reg misc --- 2014-01-26 Peter Maydell Superseded
[14/21] target-arm: A64: Implement remaining integer scalar-3-same insns --- 2014-01-26 Peter Maydell Superseded
[13/21] target-arm: A64: Implement scalar pairwise ops --- 2014-01-26 Peter Maydell Superseded
[12/21] tcg: Add TCGV_UNUSED_PTR, TCGV_IS_UNUSED_PTR, TCGV_EQUAL_PTR --- 2014-01-26 Peter Maydell Superseded
[11/21] target-arm: A64: Implement pairwise integer ops from 3-reg-same SIMD --- 2014-01-26 Peter Maydell Superseded
[10/21] target-arm: A64: Implement remaining non-pairwise int SIMD 3-reg-same insns --- 2014-01-26 Peter Maydell Superseded
[09/21] target-arm: A64: Implement SIMD 3-reg-same shift and saturate insns --- 2014-01-26 Peter Maydell Superseded
[08/21] target-arm: A64: Add SIMD shift by immediate --- 2014-01-26 Peter Maydell Superseded
[07/21] target-arm: A64: Add simple SIMD 3-same floating point ops --- 2014-01-26 Peter Maydell Superseded
[06/21] target-arm: A64: Add integer ops from SIMD 3-same group --- 2014-01-26 Peter Maydell Superseded
[05/21] target-arm: A64: Add logic ops from SIMD 3 same group --- 2014-01-26 Peter Maydell Superseded
[04/21] target-arm: A64: Add top level decode for SIMD 3-same group --- 2014-01-26 Peter Maydell Superseded
[03/21] target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops --- 2014-01-26 Peter Maydell Superseded
[02/21] target-arm: A64: Add SIMD three-different ABDL instructions --- 2014-01-26 Peter Maydell Superseded
[01/21] target-arm: A64: Add SIMD three-different multiply accumulate insns --- 2014-01-26 Peter Maydell Superseded
[PULL,60/93] block/curl: Implement the libcurl timer callback interface --- 2014-01-24 Kevin Wolf Accepted
block/curl: Implement the libcurl timer callback interface --- 2014-01-24 Paolo Bonzini Superseded
[v2,7/8] target-arm: A64: Add simple SIMD 3-same floating point ops --- 2014-01-23 Peter Maydell Superseded
tests/Makefile: Run qom-test for every architecture --- 2014-01-23 Peter Maydell Accepted
[v2,8/8] target-arm: A64: Add SIMD shift by immediate --- 2014-01-23 Peter Maydell Superseded
[v2,7/8] target-arm: A64: Add simple SIMD 3-same floating point ops --- 2014-01-23 Peter Maydell Superseded
[v2,6/8] target-arm: A64: Add integer ops from SIMD 3-same group --- 2014-01-23 Peter Maydell Superseded
[v2,5/8] target-arm: A64: Add logic ops from SIMD 3 same group --- 2014-01-23 Peter Maydell Superseded
[v2,4/8] target-arm: A64: Add top level decode for SIMD 3-same group --- 2014-01-23 Peter Maydell Superseded
[v2,3/8] target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops --- 2014-01-23 Peter Maydell Superseded
[v2,2/8] target-arm: A64: Add SIMD three-different ABDL instructions --- 2014-01-23 Peter Maydell Superseded
[v2,1/8] target-arm: A64: Add SIMD three-different multiply accumulate insns --- 2014-01-23 Peter Maydell Superseded
[v2,00/42] rework input handling, sdl2 support --- 2014-01-22 Peter Maydell Superseded
[24/24] target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI --- 2014-01-21 Peter Maydell Superseded
[23/24] target-arm: Implement AArch64 dummy breakpoint and watchpoint registers --- 2014-01-21 Peter Maydell Superseded
[22/24] target-arm: Implement AArch64 ID and feature registers --- 2014-01-21 Peter Maydell Superseded
[21/24] target-arm: Implement AArch64 generic timers --- 2014-01-21 Peter Maydell Superseded
[20/24] target-arm: Implement AArch64 MPIDR --- 2014-01-21 Peter Maydell Superseded
[19/24] target-arm: Implement AArch64 TTBR* --- 2014-01-21 Peter Maydell Superseded
[18/24] target-arm: Implement AArch64 VBAR_EL1 --- 2014-01-21 Peter Maydell Superseded
[17/24] target-arm: Implement AArch64 TCR_EL1 --- 2014-01-21 Peter Maydell Superseded
[16/24] target-arm: Implement AArch64 SCTLR_EL1 --- 2014-01-21 Peter Maydell Superseded
[15/24] target-arm: Implement AArch64 memory attribute registers --- 2014-01-21 Peter Maydell Superseded
[14/24] target-arm: Implement AArch64 dummy MDSCR_EL1 --- 2014-01-21 Peter Maydell Superseded
[13/24] target-arm: Implement AArch64 TLB invalidate ops --- 2014-01-21 Peter Maydell Superseded
[12/24] target-arm: Implement AArch64 cache invalidate/clean ops --- 2014-01-21 Peter Maydell Superseded
[11/24] target-arm: Implement AArch64 DAIF system register --- 2014-01-21 Peter Maydell Superseded
[10/24] target-arm: Implement AArch64 MIDR_EL1 --- 2014-01-21 Peter Maydell Superseded
[09/24] target-arm: Implement AArch64 CurrentEL sysreg --- 2014-01-21 Peter Maydell Superseded
[08/24] target-arm: A64: Implement MSR (immediate) instructions --- 2014-01-21 Peter Maydell Superseded
[07/24] target-arm: A64: Make cache ID registers visible to AArch64 --- 2014-01-21 Peter Maydell Superseded
[06/24] target-arm: A64: Implement store-exclusive for system mode --- 2014-01-21 Peter Maydell Superseded
[05/24] target-arm: Add exception level to the AArch64 TB flags --- 2014-01-21 Peter Maydell Superseded
[04/24] target-arm: Log bad system register accesses with LOG_UNIMP --- 2014-01-21 Peter Maydell Superseded
[03/24] target-arm: Restrict check_ap() use of S and R bits to v6 and earlier --- 2014-01-21 Peter Maydell Superseded
[02/24] target-arm: Define names for SCTLR bits --- 2014-01-21 Peter Maydell Superseded
[01/24] target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUs --- 2014-01-21 Peter Maydell Superseded
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