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Show patches with
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| 78781 patches
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Delegate
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Nobody
andy.doan@linaro.org
andy.doan@linaro.org
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«
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787
788
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Patch
Series
S/W/F
Date
Submitter
Delegate
State
[v7,07/32] target-arm: extend async excp masking
-
-
-
2014-10-24
Greg Bellows
New
[PULL,23/23] target-arm: A32: Emulate the SMC instruction
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,22/23] target-arm: make arm_current_el() return EL3
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,21/23] target-arm: rename arm_current_pl to arm_current_el
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,20/23] target-arm: reject switching to monitor mode
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,19/23] target-arm: add arm_is_secure() function
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,18/23] target-arm: increase arrays of registers R13 & R14
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,17/23] target-arm: correctly UNDEF writes to FPINST/FPINST2 from EL0
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,16/23] target-arm: Report a valid L1Ip field in CTR_EL0 for CPU type "any"
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,15/23] target-arm: Correct sense of the DCZID DZP bit
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,14/23] arm/virt: enable PSCI emulation support for system emulation
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,13/23] target-arm: add emulation of PSCI calls for system emulation
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,12/23] target-arm: Add support for A32 and T32 HVC and SMC insns
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,11/23] target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpers
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,10/23] target-arm: add missing PSCI constants needed for PSCI emulation
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,09/23] target-arm: do not set do_interrupt handlers for ARM and AArch64 user modes
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,08/23] target-arm: add powered off cpu state
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,07/23] omap_gpmc.c: Remove duplicate assignment
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,06/23] disas/libvixl/a64/instructions-a64.h: Remove unused constants
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,05/23] arm_gic: remove unused parameter.
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,04/23] disas/libvixl: Update to libvixl 1.6
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,03/23] hw/arm/boot: register cpu reset handlers if using -bios
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,02/23] hw/arm/virt: mark timer in fdt as v8-compatible
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,01/23] hmp: Remove "info pcmcia"
-
-
-
2014-10-24
Peter Maydell
Accepted
[PULL,00/23] target-arm queue
-
-
-
2014-10-24
Peter Maydell
Not Applicable
linux-user: Fix fault address truncation AArch64
-
-
-
2014-10-23
Riku Voipio
Superseded
hw/ppc/spapr_pci.c: Avoid functions not in glib 2.12 (g_hash_table_iter_*)
-
-
-
2014-10-22
Peter Maydell
Superseded
[PULL,v2,3/9] i386/pc: add piix and q35 machtypes to sorting families for -M \?
-
-
-
2014-10-22
Michael S. Tsirkin
Superseded
[PULL,v2,2/9] well-defined listing order for machine types
-
-
-
2014-10-22
Michael S. Tsirkin
New
[PULL,3/7] i386/pc: add piix and q35 machtypes to sorting families for -M \?
-
-
-
2014-10-22
Michael S. Tsirkin
Superseded
[PULL,2/7] well-defined listing order for machine types
-
-
-
2014-10-22
Michael S. Tsirkin
New
[v7,32/32] target-arm: add cpu feature EL3 to CPUs with Security Extensions
-
-
-
2014-10-21
Greg Bellows
Superseded
[v7,31/32] target-arm: make MAIR0/1 banked
-
-
-
2014-10-21
Greg Bellows
New
[v7,30/32] target-arm: make c13 cp regs banked (FCSEIDR, ...)
-
-
-
2014-10-21
Greg Bellows
New
[v7,29/32] target-arm: make PAR banked
-
-
-
2014-10-21
Greg Bellows
New
[v7,28/32] target-arm: make IFAR/DFAR banked
-
-
-
2014-10-21
Greg Bellows
New
[v7,27/32] target-arm: make DFSR banked
-
-
-
2014-10-21
Greg Bellows
New
[v7,26/32] target-arm: make IFSR banked
-
-
-
2014-10-21
Greg Bellows
New
[v7,25/32] target-arm: make DACR banked
-
-
-
2014-10-21
Greg Bellows
New
[v7,24/32] target-arm: make c2_mask and c2_base_mask banked
-
-
-
2014-10-21
Greg Bellows
New
[v7,23/32] target-arm: add TCR_EL3 and make TTBCR banked
-
-
-
2014-10-21
Greg Bellows
New
[v7,22/32] target-arm: add TTBR0_EL3 and make TTBR0/1 banked
-
-
-
2014-10-21
Greg Bellows
New
[v7,21/32] target-arm: make CSSELR banked
-
-
-
2014-10-21
Greg Bellows
New
[v7,20/32] target-arm: add SCTLR_EL3 and make SCTLR banked
-
-
-
2014-10-21
Greg Bellows
New
[v7,19/32] target-arm: add MVBAR support
-
-
-
2014-10-21
Greg Bellows
New
[v7,18/32] target-arm: add SDER definition
-
-
-
2014-10-21
Greg Bellows
New
[v7,17/32] target-arm: add NSACR register
-
-
-
2014-10-21
Greg Bellows
New
[v7,16/32] target-arm: respect SCR.FW, SCR.AW and SCTLR.NMFI
-
-
-
2014-10-21
Greg Bellows
New
[v7,15/32] target-arm: implement IRQ/FIQ routing to Monitor mode
-
-
-
2014-10-21
Greg Bellows
Superseded
[v7,14/32] target-arm: move AArch32 SCR into security reglist
-
-
-
2014-10-21
Greg Bellows
New
[v7,13/32] target-arm: insert AArch32 cpregs twice into hashtable
-
-
-
2014-10-21
Greg Bellows
New
[v7,12/32] target-arm: add secure state bit to CPREG hash
-
-
-
2014-10-21
Greg Bellows
New
[v7,11/32] target-arm: add CPREG secure state support
-
-
-
2014-10-21
Greg Bellows
New
[v7,10/32] target-arm: add non-secure Translation Block flag
-
-
-
2014-10-21
Greg Bellows
New
[v7,09/32] target-arm: add banked register accessors
-
-
-
2014-10-21
Greg Bellows
New
[v7,08/32] target-arm: add async excp target_el function
-
-
-
2014-10-21
Greg Bellows
New
[v7,07/32] target-arm: extend async excp masking
-
-
-
2014-10-21
Greg Bellows
New
[v7,06/32] target-arm: A32: Emulate the SMC instruction
-
-
-
2014-10-21
Greg Bellows
New
[v7,05/32] target-arm: make arm_current_el() return EL3
-
-
-
2014-10-21
Greg Bellows
New
[v7,04/32] target-arm: rename arm_current_pl to arm_current_el
-
-
-
2014-10-21
Greg Bellows
New
[v7,03/32] target-arm: reject switching to monitor mode
-
-
-
2014-10-21
Greg Bellows
Superseded
[v7,02/32] target-arm: add arm_is_secure() function
-
-
-
2014-10-21
Greg Bellows
New
[v7,01/32] target-arm: increase arrays of registers R13 & R14
-
-
-
2014-10-21
Greg Bellows
New
hw/i386/pc_q35.c: Avoid g_assert_cmpint() as it is not in glib 2.12
-
-
-
2014-10-17
Peter Maydell
Accepted
MAINTAINERS: add myself under 'general project admin' section
-
-
-
2014-10-15
Peter Maydell
Accepted
[PULL,28/28] target-mips: Remove unused gen_load_ACX, gen_store_ACX and cpu_ACX
-
-
-
2014-10-15
Leon Alrae
Accepted
[PULL,27/28] target-mips/dsp_helper.c: Add ifdef guards around various functions
-
-
-
2014-10-15
Leon Alrae
Accepted
[PULL,26/28] target-mips/translate.c: Add ifdef guard around check_mips64()
-
-
-
2014-10-15
Leon Alrae
Accepted
[PULL,25/28] target-mips/op_helper.c: Remove unused do_lbu() function
-
-
-
2014-10-15
Leon Alrae
Accepted
[PULL,24/28] target-mips/dsp_helper.c: Remove unused function get_DSPControl_24()
-
-
-
2014-10-15
Leon Alrae
Accepted
[PULL,2/2] hw/display/vga: Remove unused arrays dmask4 and dmask16
-
-
-
2014-10-15
Gerd Hoffmann
Accepted
target-arm: A64: remove redundant store
-
-
-
2014-10-15
Alex Bennée
Superseded
target-arm: A64: remove redundant store
-
-
-
2014-10-14
Alex Bennée
Superseded
hw/display/vga: Remove unused arrays dmask4 and dmask16
-
-
-
2014-10-10
Peter Maydell
Superseded
block.c: Fix type of IoOperationType variable in send_qmp_error_event()
-
-
-
2014-10-10
Peter Maydell
Superseded
target-arm: correctly UNDEF writes to FPINST/FPINST2 from EL0
-
-
-
2014-10-10
Peter Maydell
Superseded
target-arm: Report a valid L1Ip field in CTR_EL0 for CPU type "any"
-
-
-
2014-10-10
Peter Maydell
Superseded
target-arm: Correct sense of the DCZID DZP bit
-
-
-
2014-10-10
Peter Maydell
Superseded
[v6,32/32] target-arm: add cpu feature EL3 to CPUs with Security Extensions
-
-
-
2014-10-10
Greg Bellows
Superseded
[v6,31/32] target-arm: make MAIR0/1 banked
-
-
-
2014-10-10
Greg Bellows
New
[v6,30/32] target-arm: make c13 cp regs banked (FCSEIDR, ...)
-
-
-
2014-10-10
Greg Bellows
New
[v6,29/32] target-arm: make PAR banked
-
-
-
2014-10-10
Greg Bellows
New
[v6,28/32] target-arm: make IFAR/DFAR banked
-
-
-
2014-10-10
Greg Bellows
New
[v6,27/32] target-arm: make DFSR banked
-
-
-
2014-10-10
Greg Bellows
New
[v6,26/32] target-arm: make IFSR banked
-
-
-
2014-10-10
Greg Bellows
New
[v6,25/32] target-arm: make DACR banked
-
-
-
2014-10-10
Greg Bellows
New
[v6,24/32] target-arm: make c2_mask and c2_base_mask banked
-
-
-
2014-10-10
Greg Bellows
New
[v6,23/32] target-arm: add TCR_EL3 and make TTBCR banked
-
-
-
2014-10-10
Greg Bellows
New
[v6,22/32] target-arm: add TTBR0_EL3 and make TTBR0/1 banked
-
-
-
2014-10-10
Greg Bellows
New
[v6,21/32] target-arm: make CSSELR banked
-
-
-
2014-10-10
Greg Bellows
New
[v6,20/32] target-arm: add SCTLR_EL3 and make SCTLR banked
-
-
-
2014-10-10
Greg Bellows
New
[v6,19/32] target-arm: add MVBAR support
-
-
-
2014-10-10
Greg Bellows
New
[v6,18/32] target-arm: add SDER definition
-
-
-
2014-10-10
Greg Bellows
New
[v6,17/32] target-arm: add NSACR register
-
-
-
2014-10-10
Greg Bellows
New
[v6,16/32] target-arm: respect SCR.FW, SCR.AW and SCTLR.NMFI
-
-
-
2014-10-10
Greg Bellows
New
[v6,15/32] target-arm: implement IRQ/FIQ routing to Monitor mode
-
-
-
2014-10-10
Greg Bellows
Superseded
[v6,14/32] target-arm: move AArch32 SCR into security reglist
-
-
-
2014-10-10
Greg Bellows
New
[v6,13/32] target-arm: insert AArch32 cpregs twice into hashtable
-
-
-
2014-10-10
Greg Bellows
New
[v6,12/32] target-arm: add secure state bit to CPREG hash
-
-
-
2014-10-10
Greg Bellows
New
[v6,11/32] target-arm: add CPREG secure state support
-
-
-
2014-10-10
Greg Bellows
New
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