Show patches with: Series = target/riscv: decodetree improvments       |   8 patches
Patch Series S/W/F Date Submitter Delegate State
[for-4.1,8/8] target/riscv: Remove spaces from register names target/riscv: decodetree improvments --- 2019-04-01 Richard Henderson Superseded
[for-4.1,7/8] target/riscv: Split gen_arith_imm into functional and temp target/riscv: decodetree improvments --- 2019-04-01 Richard Henderson Superseded
[for-4.1,6/8] target/riscv: Split RVC32 and RVC64 insns into separate files target/riscv: decodetree improvments --- 2019-04-01 Richard Henderson New
[for-4.1,5/8] target/riscv: Use pattern groups in insn16.decode target/riscv: decodetree improvments --- 2019-04-01 Richard Henderson New
[for-4.1,4/8] target/riscv: Merge argument decode for RVC shifti target/riscv: decodetree improvments --- 2019-04-01 Richard Henderson New
[for-4.1,3/8] target/riscv: Merge argument sets for insn32 and insn16 target/riscv: decodetree improvments --- 2019-04-01 Richard Henderson New
[for-4.1,2/8] target/riscv: Use --static-decode for decodetree target/riscv: decodetree improvments --- 2019-04-01 Richard Henderson New
[for-4.1,1/8] target/riscv: Name the argument sets for all of insn32 formats target/riscv: decodetree improvments --- 2019-04-01 Richard Henderson New