Show patches with: Series = [PULL,01/44] target/mips: Rework cp0_timer with clock API       |   44 patches
Patch Series S/W/F Date Submitter Delegate State
[PULL,44/44] hw/ide/piix: Move registration of VMStateDescription to DeviceClass [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,43/44] hw/ide/pci: Replace some magic numbers by constants [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,42/44] hw/ide: Extract bmdma_status_writeb() [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé New
[PULL,41/44] hw/ide: Extract IDEBus assignment into bmdma_init() [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,40/44] hw/isa/vt82c686: Remove via_isa_set_irq() [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé New
[PULL,39/44] hw/ide/via: Wire up IDE legacy interrupts in host device [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,38/44] hw/ide/pci: Expose legacy interrupts as named GPIOs [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,37/44] target/mips: enable GINVx support for I6400 and I6500 [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,36/44] target/mips/mxu: Add Q8SAD instruction [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,35/44] target/mips/mxu: Add S32SFL instruction [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé New
[PULL,34/44] target/mips/mxu: Add Q8MADL instruction [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,33/44] target/mips/mxu: Add Q16SCOP instruction [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,32/44] target/mips/mxu: Add Q8MAC Q8MACSU instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé New
[PULL,31/44] target/mips/mxu: Add S32/D16/Q8- MOVZ/MOVN instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,30/44] target/mips/mxu: Add D32/Q16- SLLV/SLRV/SARV instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,29/44] target/mips/mxu: Add Q16SLL Q16SLR Q16SAR instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé New
[PULL,28/44] target/mips/mxu: Add D32SLL D32SLR D32SAR instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,27/44] target/mips/mxu: Add D32SARL D32SARW instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,26/44] target/mips/mxu: Add S32ALN S32LUI insns [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,25/44] target/mips/mxu: Add S32MUL S32MULU S32EXTR S32EXTRV insns [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,24/44] target/mips/mxu: Add S16LDD S16STD S16LDI S16SDI instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé New
[PULL,23/44] target/mips/mxu: Add S8STD S8LDI S8SDI instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,22/44] target/mips/mxu: Add Q8ADDE Q8ACCE D8SUM D8SUMC instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,21/44] target/mips/mxu: Add Q16ACC Q16ACCM D16ASUM instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,20/44] target/mips/mxu: Add D32ADDC instruction [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,19/44] target/mips/mxu: Add D32ACC D32ACCM D32ASUM instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,18/44] target/mips/mxu: Add D32ADD instruction [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,17/44] target/mips/mxu: Add Q16ADD instruction [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,16/44] target/mips/mxu: Add S16MAD instruction [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé New
[PULL,15/44] target/mips/mxu: Add D16MADL instruction [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé New
[PULL,14/44] target/mips/mxu: Add D16MACF D16MACE instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,13/44] target/mips/mxu: Add D16MULF D16MULE instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,12/44] target/mips/mxu: Add S32CPS D16CPS Q8ABD Q16SAT insns [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé New
[PULL,11/44] target/mips/mxu: Add Q8ADD instruction [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,10/44] target/mips/mxu: Add S32SLT D16SLT D16AVG[R] Q8AVG[R] insns [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,09/44] target/mips/mxu: Fix D16MAX D16MIN Q8MAX Q8MIN instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,08/44] target/mips/mxu: Add Q8SLT Q8SLTU instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,07/44] target/mips/mxu: Add S32MADD/MADDU/MSUB/MSUBU instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,06/44] target/mips/mxu: Add LXW LXB LXH LXBU LXHU instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,05/44] target/mips: Add support of two XBurst CPUs [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,04/44] target/mips: Add emulation of MXU instructions for 32-bit load/store [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé New
[PULL,03/44] hw/mips/loongson3_virt: Relax CPU restrictions for TCG [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé Accepted
[PULL,02/44] target/mips: Implement Loongson CSR instructions [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé New
[PULL,01/44] target/mips: Rework cp0_timer with clock API [PULL,01/44] target/mips: Rework cp0_timer with clock API --- 2023-07-10 Philippe Mathieu-Daudé New