Toggle navigation
Patchwork
qemu-devel
Patches
Bundles
About this project
Login
Register
Mail settings
Show patches with
: Series =
target/arm: AdvSIMD decodetree conversion, part 3
| 6 patches
Series
Submitter
State
any
Action Required
New
Under Review
Accepted
Rejected
RFC
Not Applicable
Changes Requested
Awaiting Upstream
Superseded
Deferred
Search
Archived
No
Yes
Both
Delegate
------
Nobody
andy.doan@linaro.org
andy.doan@linaro.org
Apply
Patch
Series
S/W/F
Date
Submitter
Delegate
State
[6/6] target/arm: Convert PMULL to decodetree
target/arm: AdvSIMD decodetree conversion, part 3
-
-
-
2024-07-08
Richard Henderson
Superseded
[5/6] target/arm: Convert ADDHN, SUBHN, RADDHN, RSUBHN to decodetree
target/arm: AdvSIMD decodetree conversion, part 3
-
-
-
2024-07-08
Richard Henderson
Superseded
[4/6] target/arm: Convert SADDW, SSUBW, UADDW, USUBW to decodetree
target/arm: AdvSIMD decodetree conversion, part 3
-
-
-
2024-07-08
Richard Henderson
Superseded
[3/6] target/arm: Convert SQDMULL, SQDMLAL, SQDMLSL to decodetree
target/arm: AdvSIMD decodetree conversion, part 3
-
-
-
2024-07-08
Richard Henderson
Superseded
[2/6] target/arm: Convert SADDL, SSUBL, SABDL, SABAL, and unsigned to decodetree
target/arm: AdvSIMD decodetree conversion, part 3
-
-
-
2024-07-08
Richard Henderson
Superseded
[1/6] target/arm: Convert SMULL, UMULL, SMLAL, UMLAL, SMLSL, UMLSL to decodetree
target/arm: AdvSIMD decodetree conversion, part 3
-
-
-
2024-07-08
Richard Henderson
Superseded