Show patches with: State = Action Required       |   21768 patches
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Patch Series S/W/F Date Submitter Delegate State
[v2,33/37] target/sparc: Implement FPMIN, FPMAX target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,32/37] target/sparc: Implement VIS4 comparisons target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,31/37] target/sparc: Implement 8-bit FPADD, FPADDS, and FPADDUS target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,30/37] target/sparc: Implement FALIGNDATAi target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,29/37] target/sparc: Add feature bit for VIS4 target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,28/37] target/sparc: Implement IMA extension target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,27/37] target/sparc: Enable VIS3 feature bit target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,26/37] target/sparc: Implement XMULX target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,25/37] target/sparc: Implement UMULXHI target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,24/37] target/sparc: Implement PDISTN target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,23/37] target/sparc: Implement MOVsTOw, MOVdTOx, MOVwTOs, MOVxTOd target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,22/37] target/sparc: Implement LZCNT target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,21/37] target/sparc: Implement LDXEFSR target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,20/37] target/sparc: Implement FSLL, FSRL, FSRA, FSLAS target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,19/37] target/sparc: Implement FPCMPEQ8, FPCMPNE8, FPCMPULE8, FPCMPUGT8 target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,18/37] target/sparc: Implement FPADDS, FPSUBS target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,17/37] target/sparc: Implement FPADD64, FPSUB64 target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,16/37] target/sparc: Implement FMEAN16 target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,15/37] target/sparc: Implement FLCMP target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,14/37] target/sparc: Implement FHADD, FHSUB, FNHADD, FNADD, FNMUL target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,13/37] target/sparc: Implement FCHKSM16 target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,12/37] target/sparc: Implement CMASK instructions target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,11/37] target/sparc: Implement ADDXC, ADDXCcc target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,10/37] target/sparc: Add feature bits for VIS 3 target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,09/37] target/sparc: Implement FMAf extension target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,08/37] target/sparc: Use gvec for VIS1 parallel add/sub target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,07/37] target/sparc: Remove cpu_fpr[] target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,06/37] target/sparc: Remove gen_dest_fpr_D target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,05/37] target/sparc: Perform DFPREG/QFPREG in decodetree target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,04/37] target/sparc: Fix helper_fmul8ulx16 target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,03/37] target/sparc: Fix do_dc target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,02/37] target/sparc: Rewrite gen_edge target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[v2,01/37] target/sparc: Fix ARRAY8 target/sparc: Implement VIS4 --- 2024-05-26 Richard Henderson New
[RISU,v2,13/13] sparc64: Add VIS4 instructions ELF and Sparc64 support --- 2024-05-26 Richard Henderson New
[RISU,v2,12/13] sparc64: Add IMA instructions ELF and Sparc64 support --- 2024-05-26 Richard Henderson New
[RISU,v2,11/13] sparc64: Add VIS3 instructions ELF and Sparc64 support --- 2024-05-26 Richard Henderson New
[RISU,v2,10/13] sparc64: Add VIS2 and FMAF insns ELF and Sparc64 support --- 2024-05-26 Richard Henderson New
[RISU,v2,09/13] sparc64: Add VIS1 instructions ELF and Sparc64 support --- 2024-05-26 Richard Henderson New
[RISU,v2,08/13] sparc64: Add a few logical insns ELF and Sparc64 support --- 2024-05-26 Richard Henderson New
[RISU,v2,07/13] contrib/generate_all: Do not rely on ag ELF and Sparc64 support --- 2024-05-26 Richard Henderson New
[RISU,v2,06/13] risugen: Add sparc64 support ELF and Sparc64 support --- 2024-05-26 Richard Henderson New
[RISU,v2,05/13] risugen: Be explicit about print destinations ELF and Sparc64 support --- 2024-05-26 Richard Henderson New
[RISU,v2,04/13] risu: Add initial sparc64 support ELF and Sparc64 support --- 2024-05-26 Richard Henderson New
[RISU,v2,03/13] Introduce host_context_t ELF and Sparc64 support --- 2024-05-26 Richard Henderson New
[RISU,v2,02/13] Build elf test cases instead of raw binaries ELF and Sparc64 support --- 2024-05-26 Richard Henderson New
[RISU,v2,01/13] risu: Allow use of ELF test files ELF and Sparc64 support --- 2024-05-26 Richard Henderson New
[v2,67/67] target/arm: Convert FCSEL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,66/67] target/arm: Convert FMADD, FMSUB, FNMADD, FNMSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,65/67] target/arm: Convert SQDMULH, SQRDMULH to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,64/67] target/arm: Tidy SQDMULH, SQRDMULH (vector) target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,63/67] target/arm: Convert MLA, MLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,62/67] target/arm: Convert MUL, PMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,61/67] target/arm: Convert SABA, SABD, UABA, UABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,60/67] target/arm: Convert SMAX, SMIN, UMAX, UMIN to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,59/67] target/arm: Convert SRHADD, URHADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,58/67] target/arm: Convert SRHADD, URHADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,57/67] target/arm: Convert SHSUB, UHSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,56/67] target/arm: Convert SHSUB, UHSUB to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,55/67] target/arm: Convert SHADD, UHADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,54/67] target/arm: Convert SHADD, UHADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,53/67] target/arm: Use TCG_COND_TSTNE in gen_cmtst_vec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,52/67] target/arm: Use TCG_COND_TSTNE in gen_cmtst_{i32, i64} target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,51/67] target/arm: Convert CMGT, CMHI, CMGE, CMHS, CMTST, CMEQ to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,50/67] target/arm: Convert ADD, SUB (vector) to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,49/67] target/arm: Convert SQRSHL, UQRSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,48/67] target/arm: Convert SQRSHL and UQRSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,47/67] target/arm: Convert SQSHL, UQSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,46/67] target/arm: Convert SQSHL and UQSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,45/67] target/arm: Convert SRSHL, URSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,44/67] target/arm: Convert SRSHL and URSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,43/67] target/arm: Convert SSHL, USHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,42/67] target/arm: Convert SUQADD, USQADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,41/67] target/arm: Convert SQADD, SQSUB, UQADD, UQSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,40/67] target/arm: Inline scalar SQADD, UQADD, SQSUB, UQSUB target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,39/67] target/arm: Inline scalar SUQADD and USQADD target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,38/67] target/arm: Convert SUQADD and USQADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,37/67] target/arm: Improve vector UQADD, UQSUB, SQADD, SQSUB target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,36/67] target/arm: Convert disas_simd_3same_logic to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,35/67] target/arm: Convert FMLAL, FMLSL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,34/67] target/arm: Use gvec for neon pmax, pmin target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,33/67] target/arm: Convert SMAXP, SMINP, UMAXP, UMINP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,32/67] target/arm: Use gvec for neon padd target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,31/67] target/arm: Convert ADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,30/67] target/arm: Use gvec for neon faddp, fmaxp, fminp target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,29/67] target/arm: Convert FMAXP, FMINP, FMAXNMP, FMINNMP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,28/67] target/arm: Convert FADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,27/67] target/arm: Convert FRECPS, FRSQRTS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,26/67] target/arm: Convert FABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,25/67] target/arm: Convert FCMEQ, FCMGE, FCMGT, FACGE, FACGT to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,24/67] target/arm: Convert FMLA, FMLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,23/67] target/arm: Convert FNMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,22/67] target/arm: Expand vfp neg and abs inline target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,21/67] target/arm: Introduce vfp_load_reg16 target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,20/67] target/arm: Convert FMAX, FMIN, FMAXNM, FMINNM to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,19/67] target/arm: Convert FADD, FSUB, FDIV, FMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,18/67] target/arm: Convert FMULX to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,17/67] target/arm: Convert Advanced SIMD copy to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,16/67] target/arm: Convert XAR to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,15/67] target/arm: Convert Cryptographic 3-register, imm2 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,14/67] target/arm: Convert Cryptographic 4-register to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
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