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Show patches with
: Series =
target/arm: Implement FEAT_PMUv3p5
| Archived =
No
| 10 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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Patch
Series
S/W/F
Date
Submitter
Delegate
State
[10/10] target/arm: Report FEAT_PMUv3p5 for TCG '-cpu max'
target/arm: Implement FEAT_PMUv3p5
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-
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2022-08-11
Peter Maydell
Accepted
[09/10] target/arm: Support 64-bit event counters for FEAT_PMUv3p5
target/arm: Implement FEAT_PMUv3p5
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-
-
2022-08-11
Peter Maydell
Superseded
[08/10] target/arm: Implement FEAT_PMUv3p5 cycle counter disable bits
target/arm: Implement FEAT_PMUv3p5
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-
-
2022-08-11
Peter Maydell
Superseded
[07/10] target/arm: Rename pmu_8_n feature test functions
target/arm: Implement FEAT_PMUv3p5
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-
-
2022-08-11
Peter Maydell
Superseded
[06/10] target/arm: Detect overflow when calculating next PMU interrupt
target/arm: Implement FEAT_PMUv3p5
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-
-
2022-08-11
Peter Maydell
Superseded
[05/10] target/arm: Honour MDCR_EL2.HPMD in Secure EL2
target/arm: Implement FEAT_PMUv3p5
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-
-
2022-08-11
Peter Maydell
Superseded
[04/10] target/arm: Ignore PMCR.D when PMCR.LC is set
target/arm: Implement FEAT_PMUv3p5
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-
-
2022-08-11
Peter Maydell
Superseded
[03/10] target/arm: Don't mishandle count when enabling or disabling PMU counters
target/arm: Implement FEAT_PMUv3p5
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-
-
2022-08-11
Peter Maydell
Superseded
[02/10] target/arm: Correct value returned by pmu_counter_mask()
target/arm: Implement FEAT_PMUv3p5
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-
-
2022-08-11
Peter Maydell
Superseded
[01/10] target/arm: Don't corrupt high half of PMOVSR when cycle counter overflows
target/arm: Implement FEAT_PMUv3p5
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-
-
2022-08-11
Peter Maydell
Superseded