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Show patches with
: Series =
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
| Archived =
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| 18 patches
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------
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andy.doan@linaro.org
andy.doan@linaro.org
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Patch
Series
S/W/F
Date
Submitter
Delegate
State
[v6,18/18] accel/tcg: Introduce TARGET_TB_PCREL
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
-
-
-
2022-09-30
Richard Henderson
New
[v6,17/18] accel/tcg: Introduce tb_pc and log_pc
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,16/18] hw/core: Add CPUClass.get_pc
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,15/18] include/hw/core: Create struct CPUJumpCache
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,14/18] accel/tcg: Inline tb_flush_jmp_cache
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,13/18] accel/tcg: Do not align tb->page_addr[0]
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,12/18] accel/tcg: Use DisasContextBase in plugin_gen_tb_start
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,11/18] accel/tcg: Use bool for page_find_alloc
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,10/18] accel/tcg: Remove PageDesc code_bitmap
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,09/18] include/exec: Introduce TARGET_PAGE_ENTRY_EXTRA
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,08/18] accel/tcg: Introduce tlb_set_page_full
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,07/18] accel/tcg: Introduce probe_access_full
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,06/18] accel/tcg: Suppress auto-invalidate in probe_access_internal
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,05/18] accel/tcg: Drop addr member from SavedIOTLB
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,04/18] accel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFull
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,03/18] cputlb: used cached CPUClass in our hot-paths
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,02/18] hw/core/cpu-sysemu: used cached class in cpu_asidx_from_attrs
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded
[v6,01/18] cpu: cache CPUClass in CPUState for hot code paths
tcg: CPUTLBEntryFull and TARGET_TB_PCREL
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-
-
2022-09-30
Richard Henderson
Superseded