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Patch Series S/W/F Date Submitter Delegate State
[PULL,24/29] docs: Add documentation for vhost based RNG implementation Untitled series #160118 0 0 0 2021-10-19 Michael S. Tsirkin New
[PULL,23/29] vhost-user-rng-pci: Add vhost-user-rng-pci implementation Untitled series #160118 0 0 0 2021-10-19 Michael S. Tsirkin New
[PULL,22/29] vhost-user-rng: Add vhost-user-rng implementation Untitled series #160118 0 0 0 2021-10-19 Michael S. Tsirkin New
[v2] chardev: don't exit() straight away on C-a x [v2] chardev: don't exit() straight away on C-a x 0 0 0 2021-10-19 Alex Bennée New
[v4,16/16] target/riscv: Compute mstatus.sd on demand target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,15/16] target/riscv: Use riscv_csrrw_debug for cpu_dump target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,14/16] target/riscv: Align gprs and fprs in cpu_dump target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,13/16] target/riscv: Use gen_shift*_per_ol for RVB, RVI target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,12/16] target/riscv: Use gen_unary_per_ol for RVB target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,11/16] target/riscv: Adjust trans_rev8_32 for riscv64 target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,10/16] target/riscv: Use gen_arith_per_ol for RVM target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,09/16] target/riscv: Replace DisasContext.w with DisasContext.ol target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,08/16] target/riscv: Replace is_32bit with get_xl/get_xlen target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,07/16] target/riscv: Properly check SEW in amo_op target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,06/16] target/riscv: Use REQUIRE_64BIT in amo_check64 target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,05/16] target/riscv: Add MXL/SXL/UXL to TB_FLAGS target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,04/16] target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,03/16] target/riscv: Split misa.mxl and misa.ext target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,02/16] target/riscv: Create RISCVMXL enumeration target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
[v4,01/16] target/riscv: Move cpu_get_tb_cpu_state out of line target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-19 Richard Henderson New
tests/vm/openbsd: Update to release 7.0 tests/vm/openbsd: Update to release 7.0 0 0 0 2021-10-18 Richard Henderson New
[RFC] chardev: don't exit() straight away on C-a x [RFC] chardev: don't exit() straight away on C-a x 0 0 0 2021-10-18 Alex Bennée New
[PULL,24/24] Revert "cpu: Move cpu_common_props to hw/core/cpu.c" tcg patch queue 0 0 0 2021-10-16 Richard Henderson New
[PULL,23/24] target/xtensa: Drop check for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,22/24] target/tricore: Drop check for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,21/24] target/sh4: Drop check for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,20/24] target/s390x: Drop check for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,19/24] target/rx: Drop checks for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,18/24] target/riscv: Remove exit_tb and lookup_and_goto_ptr tcg patch queue 0 0 0 2021-10-16 Richard Henderson New
[PULL,17/24] target/riscv: Remove dead code after exception tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,16/24] target/ppc: Drop exit checks for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,15/24] target/openrisc: Drop checks for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,14/24] target/mips: Drop exit checks for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,13/24] target/mips: Fix single stepping tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,12/24] target/microblaze: Drop checks for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,11/24] target/microblaze: Check CF_NO_GOTO_TB for DISAS_JUMP tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,10/24] target/m68k: Drop checks for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,09/24] target/i386: Drop check for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,08/24] target/i386: Check CF_NO_GOTO_TB for dc->jmp_opt tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,07/24] target/hppa: Drop checks for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,06/24] target/arm: Drop checks for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,05/24] target/hexagon: Drop checks for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,04/24] target/cris: Drop checks for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,03/24] target/avr: Drop checks for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,02/24] target/alpha: Drop checks for singlestep_enabled tcg patch queue 0 0 0 2021-10-16 Richard Henderson Accepted
[PULL,01/24] accel/tcg: Handle gdb singlestep in cpu_tb_exec tcg patch queue 0 0 0 2021-10-16 Richard Henderson New
[v3,14/14] target/riscv: Compute mstatus.sd on demand target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-16 Richard Henderson Superseded
[v3,13/14] target/riscv: Use gen_shift*_per_ol for RVB, RVI target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-16 Richard Henderson Superseded
[v3,12/14] target/riscv: Use gen_unary_per_ol for RVB target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-16 Richard Henderson Superseded
[v3,11/14] target/riscv: Adjust trans_rev8_32 for riscv64 target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-16 Richard Henderson Superseded
[v3,10/14] target/riscv: Use gen_arith_per_ol for RVM target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-16 Richard Henderson Superseded
[v3,09/14] target/riscv: Replace DisasContext.w with DisasContext.ol target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-16 Richard Henderson Superseded
[v3,08/14] target/riscv: Replace is_32bit with get_xl/get_xlen target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-16 Richard Henderson Superseded
[v3,07/14] target/riscv: Properly check SEW in amo_op target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-16 Richard Henderson Superseded
[v3,06/14] target/riscv: Use REQUIRE_64BIT in amo_check64 target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-16 Richard Henderson Superseded
[v3,05/14] target/riscv: Add MXL/SXL/UXL to TB_FLAGS target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-16 Richard Henderson Superseded
[v3,04/14] target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-16 Richard Henderson Superseded
[v3,03/14] target/riscv: Split misa.mxl and misa.ext target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-16 Richard Henderson Superseded
[v3,02/14] target/riscv: Create RISCVMXL enumeration target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-16 Richard Henderson Superseded
[v3,01/14] target/riscv: Move cpu_get_tb_cpu_state out of line target/riscv: Rationalize XLEN and operand length 0 0 0 2021-10-16 Richard Henderson Superseded
[v5,67/67] target/sh4: Implement prctl_unalign_sigbus user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,66/67] target/hppa: Implement prctl_unalign_sigbus user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,65/67] target/alpha: Implement prctl_unalign_sigbus user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,64/67] linux-user: Add code for PR_GET/SET_UNALIGN user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,63/67] linux-user: Disable more prctl subcodes user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,62/67] linux-user: Split out do_prctl and subroutines user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,61/67] linux-user: Handle BUS_ADRALN in host_signal_handler user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,60/67] tcg: Add helper_unaligned_{ld, st} for user-only sigbus user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,59/67] accel/tcg: Report unaligned load/store for user-only user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,58/67] accel/tcg: Report unaligned atomics for user-only user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,57/67] target/sparc: Set fault address in sparc_cpu_do_unaligned_access user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,56/67] target/sparc: Split out build_sfsr user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,55/67] target/sparc: Remove DEBUG_UNALIGNED user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,54/67] target/sh4: Set fault address in superh_cpu_do_unaligned_access user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,53/67] linux-user/hppa: Remove POWERPC_EXCP_ALIGN handling user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,52/67] target/s390x: Implement s390x_cpu_record_sigbus user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,51/67] target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,50/67] target/ppc: Set fault address in ppc_cpu_do_unaligned_access user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,49/67] target/ppc: Move SPR_DSISR setting to powerpc_excp user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,48/67] target/microblaze: Do not set MO_ALIGN for user-only user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,47/67] linux-user/hppa: Remove EXCP_UNALIGN handling user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,46/67] target/arm: Implement arm_cpu_record_sigbus user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,45/67] target/alpha: Implement alpha_cpu_record_sigbus user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,44/67] linux-user: Add cpu_loop_exit_sigbus user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,43/67] hw/core: Add TCGCPUOps.record_sigbus user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,42/67] Revert "cpu: Move cpu_common_props to hw/core/cpu.c" user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson Superseded
[v5,41/67] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,40/67] target/xtensa: Make xtensa_cpu_tlb_fill sysemu only user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,39/67] target/sparc: Make sparc_cpu_tlb_fill sysemu only user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,38/67] target/sh4: Make sh4_cpu_tlb_fill sysemu only user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,37/67] target/s390x: Implement s390_cpu_record_sigsegv user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,36/67] target/s390x: Use probe_access_flags in s390_probe_access user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,35/67] target/riscv: Make riscv_cpu_tlb_fill sysemu only user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,34/67] target/ppc: Implement ppc_cpu_record_sigsegv user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,33/67] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,32/67] linux-user/openrisc: Adjust signal for EXCP_RANGE, EXCP_FPE user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,31/67] target/nios2: Implement nios2_cpu_record_sigsegv user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,30/67] target/mips: Make mips_cpu_tlb_fill sysemu only user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,29/67] target/microblaze: Make mb_cpu_tlb_fill sysemu only user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
[v5,28/67] target/m68k: Make m68k_cpu_tlb_fill sysemu only user-only: Cleanup SIGSEGV and SIGBUS handling 0 0 0 2021-10-15 Richard Henderson New
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