From patchwork Wed Aug 24 17:28:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 3662 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id B4A6B23F41 for ; Wed, 24 Aug 2011 17:28:27 +0000 (UTC) Received: from mail-bw0-f52.google.com (mail-bw0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id A40F7A18314 for ; Wed, 24 Aug 2011 17:28:27 +0000 (UTC) Received: by bkbzs2 with SMTP id zs2so1663883bkb.11 for ; Wed, 24 Aug 2011 10:28:27 -0700 (PDT) Received: by 10.204.131.198 with SMTP id y6mr2420478bks.330.1314206906850; Wed, 24 Aug 2011 10:28:26 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.204.41.75 with SMTP id n11cs21421bke; Wed, 24 Aug 2011 10:28:26 -0700 (PDT) Received: by 10.227.147.5 with SMTP id j5mr518154wbv.109.1314206906381; Wed, 24 Aug 2011 10:28:26 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk [81.2.115.146]) by mx.google.com with ESMTPS id el1si3256386wbb.101.2011.08.24.10.28.24 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 24 Aug 2011 10:28:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1QwHFV-0004oD-TA; Wed, 24 Aug 2011 18:28:21 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Avi Kivity Subject: [PATCH] hw/smc91c111: Convert to MemoryRegion Date: Wed, 24 Aug 2011 18:28:21 +0100 Message-Id: <1314206901-18462-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 Signed-off-by: Peter Maydell --- This is against master and doesn't depend on or conflict with anything that's in Avi's branch. (I needed this because I've just rebased qemu-linaro on master and one of the omap3 boards connects an smc91c111 up to the omap_gpmc, which means it needs to be able to expose a MemoryRegion*.) hw/smc91c111.c | 29 +++++++++++++---------------- 1 files changed, 13 insertions(+), 16 deletions(-) diff --git a/hw/smc91c111.c b/hw/smc91c111.c index 3a8a85c..fc8c498 100644 --- a/hw/smc91c111.c +++ b/hw/smc91c111.c @@ -43,7 +43,7 @@ typedef struct { uint8_t data[NUM_PACKETS][2048]; uint8_t int_level; uint8_t int_mask; - int mmio_index; + MemoryRegion mmio; } smc91c111_state; static const VMStateDescription vmstate_smc91c111 = { @@ -717,16 +717,15 @@ static ssize_t smc91c111_receive(VLANClientState *nc, const uint8_t *buf, size_t return size; } -static CPUReadMemoryFunc * const smc91c111_readfn[] = { - smc91c111_readb, - smc91c111_readw, - smc91c111_readl -}; - -static CPUWriteMemoryFunc * const smc91c111_writefn[] = { - smc91c111_writeb, - smc91c111_writew, - smc91c111_writel +static const MemoryRegionOps smc91c111_mem_ops = { + /* The special case for 32 bit writes to 0xc means we can't just + * set .impl.min/max_access_size to 1, unfortunately + */ + .old_mmio = { + .read = { smc91c111_readb, smc91c111_readw, smc91c111_readl, }, + .write = { smc91c111_writeb, smc91c111_writew, smc91c111_writel, }, + }, + .endianness = DEVICE_NATIVE_ENDIAN, }; static void smc91c111_cleanup(VLANClientState *nc) @@ -747,11 +746,9 @@ static NetClientInfo net_smc91c111_info = { static int smc91c111_init1(SysBusDevice *dev) { smc91c111_state *s = FROM_SYSBUS(smc91c111_state, dev); - - s->mmio_index = cpu_register_io_memory(smc91c111_readfn, - smc91c111_writefn, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, 16, s->mmio_index); + memory_region_init_io(&s->mmio, &smc91c111_mem_ops, s, + "smc91c111-mmio", 16); + sysbus_init_mmio_region(dev, &s->mmio); sysbus_init_irq(dev, &s->irq); qemu_macaddr_default_if_unset(&s->conf.macaddr); s->nic = qemu_new_nic(&net_smc91c111_info, &s->conf,