From patchwork Wed Feb 29 17:54:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 7011 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id E86A423E4A for ; Wed, 29 Feb 2012 17:54:46 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id A4394A1801F for ; Wed, 29 Feb 2012 17:54:46 +0000 (UTC) Received: by iage36 with SMTP id e36so3667071iag.11 for ; Wed, 29 Feb 2012 09:54:46 -0800 (PST) Received: from mr.google.com ([10.50.170.41]) by 10.50.170.41 with SMTP id aj9mr1643971igc.0.1330538086071 (num_hops = 1); Wed, 29 Feb 2012 09:54:46 -0800 (PST) MIME-Version: 1.0 Received: by 10.50.170.41 with SMTP id aj9mr1340994igc.0.1330538085958; Wed, 29 Feb 2012 09:54:45 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.53.18 with SMTP id k18csp9031ibg; Wed, 29 Feb 2012 09:54:44 -0800 (PST) Received: by 10.180.103.35 with SMTP id ft3mr2479524wib.0.1330538084143; Wed, 29 Feb 2012 09:54:44 -0800 (PST) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id p2si17748292weq.26.2012.02.29.09.54.43 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 29 Feb 2012 09:54:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1S2njd-00014W-0F; Wed, 29 Feb 2012 17:54:41 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paul Brook Subject: [PATCH] target-arm: Fix typo in ARM946 cp15 c5 handling Date: Wed, 29 Feb 2012 17:54:40 +0000 Message-Id: <1330538080-4097-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 X-Gm-Message-State: ALoCoQlrlt1A4fvCESvh7SlFdfnz9mxBK1CnvDMrEoTGkxAQ8IBdUbXaBIm+UxzA//pq176HZh+p Fix a typo in handling of the ARM946 cp15 c5 c0 0 1 handling (instruction access permission bits) that meant it would return the data access permission bits by mistake. Signed-off-by: Peter Maydell --- (Yeah, it says ARM_FEATURE_MPU but actually (a) the only MPU core we support is the 946 and (b) these registers are 946 specific -- in PMSAv6 and v7 this encoding is the IFSR, the same as it is for VMSA.) target-arm/helper.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 4929372..8e6da06 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2030,7 +2030,7 @@ uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn) return env->cp15.c5_data; case 1: if (arm_feature(env, ARM_FEATURE_MPU)) - return simple_mpu_ap_bits(env->cp15.c5_data); + return simple_mpu_ap_bits(env->cp15.c5_insn); return env->cp15.c5_insn; case 2: if (!arm_feature(env, ARM_FEATURE_MPU))